Patents by Inventor Gary S. Bolotin

Gary S. Bolotin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11703544
    Abstract: Current sensing devices that are capable of surviving harsh ambient environment of ocean worlds, such as Jupiter and Saturn moons are disclosed. The described devices can meet 300 Krad radiation requirements and can survive at cold temperatures down to ?184° C. Exemplary implementations of the constituent circuits of the devices are presented. A scheduling algorithm to perform various measurement by the disclosed current sensing devices is also described.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: July 18, 2023
    Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Gary S. Bolotin, Don J. Hunter, Malcolm L. Lias, Ben Cheng, John J. Waters, Sunant Katanyoutanant
  • Publication number: 20210389377
    Abstract: Current sensing devices that are capable of surviving harsh ambient environment of ocean worlds, such as Jupiter and Saturn moons are disclosed. The described devices can meet 300 Krad radiation requirements and can survive at cold temperatures down to ?184° C. Exemplary implementations of the constituent circuits of the devices are presented. A scheduling algorithm to perform various measurement by the disclosed current sensing devices is also described.
    Type: Application
    Filed: June 4, 2021
    Publication date: December 16, 2021
    Inventors: Gary S. Bolotin, Don J. Hunter, Malcolm L. Lias, Ben Cheng, John J. Waters, Sunant Katanyoutanant
  • Patent number: 6206705
    Abstract: A three-dimensional connection system uses a plurality of printed wiring boards with connectors completely around the printed wiring boards, and connected by an elastomeric interface connector. The device includes internal space to allow room for circuitry. The device is formed by stacking an electronics module, an elastomeric interface board on the electronics module such that the interface board's exterior makes electrical connection with the connectors around the perimeter of the interface board, but the internal portion is open to allow room for the electrical devices on the printed wiring board. A plurality of these devices are stacked between a top stiffener and a bottom device, and held into place by alignment elements.
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: March 27, 2001
    Assignee: California Institute of Technology
    Inventors: Gary S. Bolotin, John Cardone
  • Patent number: 5790567
    Abstract: An uplink controlling assembly speeds data processing using a special parallel codeblock technique. A correct start sequence initiates processing of a frame. Two possible start sequences can be used; and the one which is used determines whether data polarity is inverted or non-inverted. Processing continues until uncorrectable errors are found. The frame ends by intentionally sending a block with an uncorrectable error. Each of the codeblocks in the frame has a channel ID. Each channel ID can be separately processed in parallel. This obviates the problem of waiting for error correction processing. If that channel number is zero, however, it indicates that the frame of data represents a critical command only. That data is handled in a special way, independent of the software. Otherwise, the processed data further handled using special double buffering techniques to avoid problems from overrun. When overrun does occur, the system takes action to lose only the oldest data.
    Type: Grant
    Filed: August 28, 1995
    Date of Patent: August 4, 1998
    Assignee: California Institute of Technology
    Inventors: Gary S. Bolotin, James A. Donaldson, Huy H. Luong, Steven H. Wood
  • Patent number: 4933936
    Abstract: This is a distributed computing system providing flexible fault tolerance; ease of software design and concurrency specification; and dynamic balance of the loads. The system comprises a plurality of computers each having a first input/output interface and a second input/output interface for interfacing to communications networks each second input/output interface including a bypass for bypassing the associated computer. A global communications network interconnects the first input/output interfaces for providing each computer the ability to broadcast messages simultaneously to the remainder of the computers. A meshwork communications network interconnects the second input/output interfaces providing each computer with the ability to establish a communications link with another of the computers bypassing the remainder of computers. Each computer is controlled by a resident copy of a common operating system.
    Type: Grant
    Filed: August 17, 1987
    Date of Patent: June 12, 1990
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Robert D. Rasmussen, Robert M. Manning, Blair F. Lewis, Gary S. Bolotin, Richard S. Ward