Abstract: A low cost DTV translator, which translates an incoming signal on channel A to an outgoing signal on channel B, includes a transmitter pre-equalizer whose taps are configured with tap values that pre-distort a signal so as to negate distortion caused by a high power amplifier and emission mask filter at the output of the DTV translator. This pre-distortion is accomplished by using the transmitter of the DTV translator to provided a reference signal and to use the receiver of the DTV translator as a reference receiver for the reference signal to thereby avoid the use of a more expensive external reference receiver.

Abstract: A FPLL has first second and third multipliers with the first multiplier supplying demodulated signals to a limiter and the second multiplier supplying signals to the loop filter. A VCO and phase shift circuit supply quadrature signals to the first multiplier and to the third multiplier which is relocated to an AC path in the loop to avoid the effects of offsets due to stray DC voltages and currents. The limiter output is applied to the third multiplier. The third multiplier supplies its output to the second multiplier. An integrated circuit embodiment using an exclusive OR gate as the third multiplier is also shown.