Patents by Inventor Gary T. Corcoran

Gary T. Corcoran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Processor adapted for sharing memory with more than one type of processor
    Patent number: 5446865
    Abstract: A processor specially adapted for use as a coprocessor. The processor is implemented as a microprocessor. The adaptations include the following: The microprocessor has a master-slave pin which receives an input which determines whether the microprocessor operates as a bus master or a bus slave. Certain output pins have three-state bus drivers which employ feedback to ensure that a signal on a line being even by the driver has gone inactive before the driver is turned off. Instructions executed by the microprocessor permit specification of portions of the internal registers as sources and destinations and specification of the size of an ALU operation, permitting easy operation on data ranging from bytes through 24-bit pointers. Instructions are executed in an instruction pipeline and a separate I/O instruction pipeline.
    Type: Grant
    Filed: March 13, 1990
    Date of Patent: August 29, 1995
    Assignee: AT&T Corp.
    Inventors: Gary T. Corcoran, Robert C. Fairfield, Akkas T. Sufi
  • Processor having general registers with subdivisions addressable in instructions by register number and subdivision type
    Patent number: 5442769
    Abstract: A processor specially adapted for use as a coprocessor. The processor is implemented as a microprocessor. The adaptations include the following: The microprocessor has a master-slave pin which receives an input which determines whether the microprocessor operates as a bus master or a bus slave. Certain output pins have three-state bus drivers which employ feedback to ensure that a signal on a line being driven by the driver has gone inactive before the driver is turned off. Instructions executed by the microprocessor permit specification of portions of the internal registers as sources and destinations and specification of the size of an ALU operation, permitting easy operation on data ranging from bytes through 24-bit pointers. Instructions are executed in an instruction pipeline and a separate I/O instruction pipeline.
    Type: Grant
    Filed: April 7, 1993
    Date of Patent: August 15, 1995
    Assignee: AT&T Corp.
    Inventors: Gary T. Corcoran, Robert C. Fairfield
  • Apparatus for controlling instruction execution in a pipelined processor
    Patent number: 5327537
    Abstract: A processor which is specially adapted for use as a coprocessor. The processor is implemented as a microprocessor. The adaptations include the following: The microprocessor has a master-slave pin which receives an input which determines whether the microprocessor operates as a bus master or a bus slave. Certain output pins have three-state bus drivers which employ feedback to ensure that a signal on a line being driven by the driver has gone inactive before the driver is turned off. Instructions executed by the microprocessor permit specification of portions of the internal registers as sources and destinations and specification of the size of an ALU operation, permitting easy operation on data ranging from bytes through 24-bit pointers. Instructions are executed in an instruction pipeline and a separate I/O instruction pipeline.
    Type: Grant
    Filed: May 18, 1993
    Date of Patent: July 5, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Gary T. Corcoran, Robert C. Fairfield
  • Processor usable as a bus master or a bus slave
    Patent number: 5278959
    Abstract: A processor specially adapted for use as a coprocessor The processor is implemented as a microprocessor. The adaptations include the following: The microprocessor has a master-slave pin which receives an input which determines whether the microprocessor operates as a bus master or a bus slave. Certain outputs pins have three-state bus drivers which employ feedback to ensure that a signal on a line being driven by the driver has gone inactive before the driver is turned off. Instructions executed by the microprocessor permit specification of portions of the internal registers as sources and destinations and specification of the size of an ALU operation, permitting easy operation on data ranging from bytes through 24-bit pointers. Instructions are executed in an instruction pipeline and a separate I/O instruction pipeline.
    Type: Grant
    Filed: March 13, 1993
    Date of Patent: January 11, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Gary T. Corcoran, Robert C. Fairfield