Patents by Inventor Gary William Ray

Gary William Ray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Creation of porosity in low-k films by photo-disassociation of imbedded nanoparticles
    Patent number: 8062983
    Abstract: Porous dielectric layers are produced by embedding and removing nanoparticles in composite dielectric layers. The pores may be produced after the barrier material, the metal or other conductive material is deposited to form a metallization layer. In this manner, the conductive material is provided with a relatively smooth continuous surface on which to deposit.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: November 22, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Nerissa S. Draeger, Gary William Ray
  • VLSI fabrication processes for introducing pores into dielectric materials
    Patent number: 7972976
    Abstract: Porous dielectric layers are produced by introducing pores in pre-formed composite dielectric layers. The pores may be produced after the barrier material, the metal or other conductive material is deposited to form a metallization layer. In this manner, the conductive material is provided with a relatively smooth continuous surface on which to deposit.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: July 5, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Willibrordus Gerardus Maria van den Hoek, Nerissa S. Draeger, Raashina Humayun, Richard S. Hill, Jianing Sun, Gary William Ray
  • VLSI fabrication processes for introducing pores into dielectric materials
    Patent number: 7166531
    Abstract: Porous dielectric layers are produced by introducing pores in pre-formed composite dielectric layers. The pores may be produced after the barrier material, the metal or other conductive material is deposited to form a metallization layer. In this manner, the conductive material is provided with a relatively smooth continuous surface on which to deposit.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: January 23, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Willibrordus Gerardus Maria van den Hoek, Nerissa S. Draeger, Raashina Humayun, Richard S. Hill, Jianing Sun, Gary William Ray
  • Method for fabricating an interconnect structure with hard mask and low dielectric constant materials
    Patent number: 6027995
    Abstract: An interconnect system is provided. The interconnect system includes a silicon substrate and a first dielectric layer formed upon the silicon substrate. The interconnect system also includes a first level of at least two electrically conductive lines formed upon the first dielectric layer. The interconnect system further includes a region of low dielectric constant material formed between the at least two electrically conductive lines. The interconnect system also includes a first hard mask formed upon the polymer region.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: February 22, 2000
    Assignee: Intel Corporation
    Inventors: Chien Chiang, Chuanbin Pan, Vicky M. Ochoa, Sychyi Fang, David B. Fraser, Joyce C. Sum, Gary William Ray, Jeremy A. Theil
  • Interconnect structure with hard mask and low dielectric constant materials
    Patent number: 5886410
    Abstract: An interconnect system is provided. The interconnect system includes a silicon substrate and a first dielectric layer formed upon the silicon substrate. The interconnect system also includes a first level of at least two electrically conductive lines formed upon the first dielectric layer. The interconnect system further includes a region of low dielectric constant material formed between the at least two electrically conductive lines. The interconnect system also includes a first hard mask formed upon the polymer region.
    Type: Grant
    Filed: June 26, 1996
    Date of Patent: March 23, 1999
    Assignee: Intel Corporation
    Inventors: Chien Chiang, Chuanbin Pan, Vicky M. Ochoa, Sychyi Fang, David B. Fraser, Joyce C. Sum, Gary William Ray, Jeremy A. Theil