Abstract: The present disclosure relates to a breathing assistance apparatus for providing a breathing assistance to a user. The breathing assistance apparatus includes a first/second source configured with a first/second buffer. The first/second fluid is controllably transferred from the first/second source to the first/second buffer using any or combination of a first/second pressure regulators and one or more first/second valves. A mixing chamber configured with the first buffer and the second buffer to receive and mix the first fluid and the second fluid. A delivery tank configured with the mixing tank to controllably receive the third fluid through one or more fourth valves and a third pressure regulator. A user feed mask having an inlet configured with the delivery tank and user's face facilitating breathing assistance to the user.

Abstract: A plurality of images can be acquired from a plurality of sensors and a plurality of flattened patches can be extracted from the plurality of images. An image location in the plurality of images and a sensor type token identifying a type of sensor used to acquire an image in the plurality of images from which the respective flattened patch was acquired can be added to each of the plurality of flattened patches. The flattened patches can be concatenated into a flat tensor and add a task token indicating a processing task to the flat tensor, wherein the flat tensor is a one-dimensional array that includes two or more types of data. The flat tensor can be input to a first deep neural network that includes a plurality of encoder layers and a plurality of decoder layers and outputs transformer output. The transformer output can be input to a second deep neural network that determines an object prediction indicated by the token and the object predictions can be output.

Abstract: The present disclosure relates to a breathing assistance apparatus for providing a breathing assistance to a user. The breathing assistance apparatus includes a first/second source configured with a first/second buffer. The first/second fluid is controllably transferred from the first/second source to the first/second buffer using any or combination of a first/second pressure regulators and one or more first/second valves. A mixing chamber configured with the first buffer and the second buffer to receive and mix the first fluid and the second fluid. A delivery tank configured with the mixing tank to controllably receive the third fluid through one or more fourth valves and a third pressure regulator. A user feed mask having an inlet configured with the delivery tank and user's face facilitating breathing assistance to the user.

Abstract: The present disclosure relates to an integrated wideband Radio Frequency (RF) amplifier, based on a complementary metal oxide semiconductor (CMOS) technology. In an embodiment the amplifier addresses the shortcomings of conventional wideband amplifiers and is based on a distributed amplifier (DA) topology which typically exhibit severe performance degradation when externally loaded with parasitic circuit elements. In an embodiment of the present invention a buffer amplifier at the output of a conventional DA is able to compensate the impact of parasitic elements. The disclosed circuit can be implemented by fabricating the wideband RF amplifier integrated circuit (IC) on a 130 nm CMOS technology or other comparable CMOS technologies.

Abstract: The present disclosure relates to an integrated wideband Radio Frequency (RF) amplifier, based on a complementary metal oxide semiconductor (CMOS) technology. In an embodiment the amplifier addresses the shortcomings of conventional wideband amplifiers and is based on a distributed amplifier (DA) topology which typically exhibit severe performance degradation when externally loaded with parasitic circuit elements. In an embodiment of the present invention a buffer amplifier at the output of a conventional DA is able to compensate the impact of parasitic elements. The disclosed circuit can be implemented by fabricating the wideband RF amplifier integrated circuit (IC) on a 130 nm CMOS technology or other comparable CMOS technologies.

Abstract: A built-in self test (BiST) system is described. The BiST system includes a circuit-under-test. The BiST system also includes one or more embedded sensors. Each of the embedded sensors includes one or more switches connected to one or more nodes within the circuit-under-test. The BiST system further includes a signal generator. The BiST system also includes a bus interface. The bus interface provides for external access of the BiST system.

Abstract: A built-in self test (BiST) system is described. The BiST system includes a circuit-under-test. The BiST system also includes one or more embedded sensors. Each of the embedded sensors includes one or more switches connected to one or more nodes within the circuit-under-test. The BiST system further includes a signal generator. The BiST system also includes a bus interface. The bus interface provides for external access of the BiST system.

Abstract: An integrated circuit with Built-in Self Test (BiST) is described. The integrated circuit includes a signal generator used to perform a BiST on the integrated circuit. The integrated circuit also includes a local oscillator used by the signal generator to generate one or more test signals used to perform the BiST on the integrated circuit.

Abstract: In some embodiments a passive impedance equalization network for high speed serial links is described. The impedance equalization network includes at least one stepped impedance transformer near points of impedance discontinuities. The impedance discontinuities may be at an interface connection between two circuit boards. The impedance discontinuities on a circuit board may be at a die-package interface and/or a package-board interface. The stepped impedance transformer may be formed in a package trace, a board trace or both. Forming the stepped impedance transformers in the traces requires no modification to existing package/board design methodology or technology. The stepped impedance transformers can provide impedance matching over a range of frequencies. To account for modeling errors in the design of the stepped impedance transformers integrated circuits transmitting data over the serial link may include active circuitry to select an output/input impedance for transmitters/receivers.

Abstract: A strained-silicon voltage controlled oscillator (VCO) includes a first p-channel metal oxide semiconductor (PMOS) device having a strained-silicon layer coupled to a second PMOS device having a strained-silicon layer.

Abstract: An apparatus and system may include a microstrip line capable of being coupled to an amplifier, wherein the microstrip line is to transform an input impedance of the amplifier to a substantially resistive value, and wherein the microstrip line has a characteristic impedance approximately equal to a selected system reference impedance. The apparatus and system may include a transformer coupled to the microstrip line, wherein the transformer is to transform the substantially resistive value into approximately a resistance of a source impedance included in a source. An article may include data, which, when accessed, results in a machine performing a method including simulating selecting a system having a reference impedance and simulating coupling an amplifier having an input impedance to a source having a source impedance using a transformer coupled to a microstrip line.

Abstract: A semiconductor device or a circuit includes a controllable oscillator and circuitry that senses a voltage which may control the controllable oscillator and digitally controls a gain compensation, adaptively compensating for a drop in a gain against overall loop gain within a closed loop. In one embodiment, a single supply source may be used to power the closed loop while a variable gain stage that is digitally controllable may adjust the gain in a feed-forward manner based on the drop.

Abstract: A strained-silicon voltage controlled oscillator (VCO) includes a first p-channel metal oxide semiconductor (PMOS) device having a strained-silicon layer coupled to a second PMOS device having a strained-silicon layer.

Abstract: Briefly, devices and methods which may be used in conjunction with a Complementary Metal-Oxide Semiconductor (CMOS) process. Exemplary embodiments of the invention may provide an enhanced charge-pump circuit with gain compensation, an enhanced varactor with wide tuning range, and/or enhanced Phase-Lock Loop (PLL) circuits, which may be used, for example, within various oscillators and/or wireless communication devices.

Abstract: An apparatus and system may include a microstrip line capable of being coupled to an amplifier, wherein the microstrip line is to transform an input impedance of the amplifier to a substantially resistive value, and wherein the microstrip line has a characteristic impedance approximately equal to a selected system reference impedance. The apparatus and system may include a transformer coupled to the microstrip line, wherein the transformer is to transform the substantially resistive value into approximately a resistance of a source impedance included in a source. An article may include data, which, when accessed, results in a machine performing a method including simulating selecting a system having a reference impedance and simulating coupling an amplifier having an input impedance to a source having a source impedance using a transformer coupled to a microstrip line.

Abstract: A semiconductor device or a circuit includes a controllable oscillator and circuitry that senses a voltage which may control the controllable oscillator and digitally controls a gain compensation, adaptively compensating for a drop in a gain against overall loop gain within a closed loop. In one embodiment, a single supply source may be used to power the closed loop while a variable gain stage that is digitally controllable may adjust the gain in a feed-forward manner based on the drop.