Patents by Inventor Gaurav HADA

Gaurav HADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240334715
    Abstract: Technologies for memory on package with reduced package thickness are disclosed. In the illustrative embodiment, a die assembly includes a substrate with a processor die mounted on the top surface and a memory die mounted on the bottom surface. The die assembly is mounted on another substrate, such as a mainboard. A cavity is defined in the mainboard, and the memory die mounted on the bottom surface of the die assembly is positioned in the cavity. Positioning the memory die on the bottom surface of the die assembly can reduce the overall thickness of the die assembly and, therefore, can reduce the overall thickness of a device that incorporates the die assembly.
    Type: Application
    Filed: March 27, 2023
    Publication date: October 3, 2024
    Applicant: Intel Corporation
    Inventors: Navneet Kumar Singh, Phani Alaparthi, Samarth Alva, Ritu Bawa, Gaurav Hada, Aiswarya M. Pious
  • Patent number: 12025971
    Abstract: An apparatus includes a memory interposer including a socket including an inner surface, one or more memories disposed on the inner surface, a bottom surface opposite to the inner surface, and pogo pins disposed on the bottom surface and respectively corresponding to the one or more memories, the pogo pins being configured to connect the one or more memories to a printed circuit board (PCB) including a semiconductor die. The apparatus further includes an intermediate thermal head attached to the memory interposer. The memory interposer is movable with respect to the intermediate thermal head.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: July 2, 2024
    Assignee: Intel Corporation
    Inventors: Navneet Singh, Samarth Alva, Amarjeet Kumar, Gaurav Hada
  • Publication number: 20230251629
    Abstract: An apparatus includes a memory interposer including a socket including an inner surface, one or more memories disposed on the inner surface, a bottom surface opposite to the inner surface, and pogo pins disposed on the bottom surface and respectively corresponding to the one or more memories, the pogo pins being configured to connect the one or more memories to a printed circuit board (PCB) including a semiconductor die. The apparatus further includes an intermediate thermal head attached to the memory interposer. The memory interposer is movable with respect to the intermediate thermal head.
    Type: Application
    Filed: February 9, 2022
    Publication date: August 10, 2023
    Inventors: Navneet SINGH, Samarth ALVA, Amarjeet KUMAR, Gaurav HADA
  • Publication number: 20220077609
    Abstract: A connector to connect an electronic module to an edge of a first electronic circuit board is described. The module has a second electronic circuit board. The connector has a top part that houses a first row of I/Os. The top part is to be placed on a surface of the first electronic circuit board. The connector has a bottom part that houses a second row of I/Os. The bottom part is to be placed on an opposite surface of the first electronic circuit board, wherein, the top and bottom parts form inner and outer stand-offs when mater together. The inner stand-off is to reside within a through hole of the first electronic circuit board. The outer stand-off is to reside within free space off the edge of the first electronic circuit board. The second electronic circuit board is to be pressed in between the first row of I/Os and the second row of I/Os when the module is connected to the connector.
    Type: Application
    Filed: September 20, 2021
    Publication date: March 10, 2022
    Inventors: Navneet Kumar SINGH, Aiswarya M. PIOUS, Richard S. PERRY, Amarjeet KUMAR, Siva Prasad JANGILI GANGA, Gaurav HADA, Sushil PADMANABHAN, Konika GANGULY