Abstract: A divider for an oven includes a first panel configured to spatially separate the oven cavity into respective upper and lower sub-cavities. The first panel defines a first plurality of apertures therethrough. A second panel is slidably mounted to the first panel and defines a second plurality of apertures that are collectively moveable relative to the first plurality of apertures by sliding of the second panel relative to the first panel between a heat transmission position and a closed position, wherein the ones of the second plurality of apertures are respectively aligned and unaligned with the respective ones of the first apertures. In various aspects, the divider may be configured as an integrated or permanently installed feature of an oven or may be a removable accessory for use with an oven.

Abstract: Some embodiments described herein are directed to memory page or bad block monitoring and retirement algorithms, systems and methods for random access memory (RAM). Reliability issues or errors can be detected for multiple memory pages using one or more retirement criterion. In some embodiments, when reliability errors are detected, it may be desired to remove such pages from operation before they create a more serious problem, such as a computer crash. Thus, bad block retirement and replacement mechanisms are described herein.

Abstract: Embodiments of the present disclosure relate to physical secure erase (PSE) of solid state drives (SSDs). One embodiment of a method of PSE of a SSD includes receiving a PSE command, erasing the memory cells of the blocks, programming the memory cells, and programming the select gates to a portion of the blocks. One embodiment of a SSD includes a controller and a plurality of blocks having a plurality of NAND strings. Each NAND string includes connected in series a select gate drain, memory cells, and a select gate source. The SSD includes a memory erasing instruction that cause the controller to erase the memory cells of the block, program the memory cells, and increase the threshold voltage to the select gate drain and/or the select gate source of some of the NAND strings from the blocks.

Abstract: Described herein are a system and techniques for dynamically generating targeted media content. In some embodiments, the system identifies an appropriate template based on the content currently being consumed by a user, preferences or attributes associated with that user, a product to be presented, or any other suitable factor. Once a temple has been selected, a product may be selected for presentation to the user based on the content currently being consumed by a user, preferences or attributes associated with that user, or any other suitable factor. The selected template is then populated using attributes of the user and/or the product. Once populated, the text in the populated template may be smoothed. The generated content may then be synthesized into a different format, in order to match a format of content currently being consumed by a user, which may then be presented to the user.

Abstract: Some embodiments described herein are directed to memory page or bad block monitoring and retirement algorithms, systems and methods for random access memory (RAM). Reliability issues or errors can be detected for multiple memory pages using one or more retirement criterion. In some embodiments, when reliability errors are detected, it may be desired to remove such pages from operation before they create a more serious problem, such as a computer crash. Thus, bad block retirement and replacement mechanisms are described herein.

Abstract: Some embodiments described herein are directed to memory page or bad block monitoring and retirement algorithms, systems and methods for random access memory (RAM). Reliability issues or errors can be detected for multiple memory pages using one or more retirement criterion. In some embodiments, when reliability errors are detected, it may be desired to remove such pages from operation before they create a more serious problem, such as a computer crash. Thus, bad block retirement and replacement mechanisms are described herein.

Abstract: Embodiments of the present disclosure relate to physical secure erase (PSE) of solid state drives (SSDs). One embodiment of a method of PSE of a SSD includes receiving a PSE command, erasing the memory cells of the blocks, programming the memory cells, and programming the select gates to a portion of the blocks. One embodiment of a SSD includes a controller and a plurality of blocks having a plurality of NAND strings. Each NAND string includes connected in series a select gate drain, memory cells, and a select gate source. The SSD includes a memory erasing instruction that cause the controller to erase the memory cells of the block, program the memory cells, and increase the threshold voltage to the select gate drain and/or the select gate source of some of the NAND strings from the blocks.

Abstract: Embodiments of the present disclosure relate to physical secure erase (PSE) of solid state drives (SSDs). One embodiment of a method of PSE of a SSD includes receiving a PSE command, erasing the memory cells of the blocks, programming the memory cells, and programming the select gates to a portion of the blocks. One embodiment of a SSD includes a controller and a plurality of blocks having a plurality of NAND strings. Each NAND string includes connected in series a select gate drain, memory cells, and a select gate source. The SSD includes a memory erasing instruction that cause the controller to erase the memory cells of the block, program the memory cells, and increase the threshold voltage to the select gate drain and/or the select gate source of some of the NAND strings from the blocks.

Abstract: A memory device and associated techniques avoid reading memory cells immediately after programming when uncorrectable errors may be present. In one aspect, data is copied from one block to another block and a timer is started after the copying is completed. If a read command is received before the timer has expired, the read operation proceeds by reading the one block. If the read command is received after the timer has expired, the read operation proceeds by reading the another block. This approach is particular suitable when data is copied from single-level cell (SLC) blocks to multi-level cell (MLC) blocks in a folding operation. The duration of the timer can be increased at lower temperatures.

Abstract: Embodiments of the present disclosure relate to physical secure erase (PSE) of solid state drives (SSDs). One embodiment of a method of PSE of a SSD includes receiving a PSE command, erasing the memory cells of the blocks, programming the memory cells, and programming the select gates to a portion of the blocks. One embodiment of a SSD includes a controller and a plurality of blocks having a plurality of NAND strings. Each NAND string includes connected in series a select gate drain, memory cells, and a select gate source. The SSD includes a memory erasing instruction that cause the controller to erase the memory cells of the block, program the memory cells, and increase the threshold voltage to the select gate drain and/or the select gate source of some of the NAND strings from the blocks.

Abstract: A memory device and associated techniques avoid reading memory cells immediately after programming when uncorrectable errors may be present. In one aspect, data is copied from one block to another block and a timer is started after the copying is completed. If a read command is received before the timer has expired, the read operation proceeds by reading the one block. If the read command is received after the timer has expired, the read operation proceeds by reading the another block. This approach is particular suitable when data is copied from single-level cell (SLC) blocks to multi-level cell (MLC) blocks in a folding operation. The duration of the timer can be increased at lower temperatures.

Abstract: A memory system or flash card may include a dynamic system-level process for the management of blocks in the different memory pools. There may be spare blocks available to the pools that are over provisioned to the pool which increases the efficiency of data compaction and helps reduce the average hot count for that pool and compensate for the grown defects. The block wear and grown defects in each memory pool may be tracked so that remaining spare blocks can be re-allocated.

Abstract: A memory system or flash card may include memory maintenance scheduling that improves the endurance of memory. Certain parameters, such as temperature, are measured and used for scheduling maintenance. For example, memory maintenance may be performed or postponed depending on the ambient temperature of the card. The memory maintenance operations may be ranked or classified (e.g. in a memory maintenance queue based on priority) to correspond with threshold values of the parameters for a more efficient scheduling of memory maintenance. For example, at a low temperature threshold, only high priority maintenance operations are performed, while at a higher temperature threshold, any priority maintenance operation is performed.

Abstract: A mobile device peripheral is provided comprising a wireless memory sub-system configured for carrying out wireless data communications with a mobile device. The mobile device peripheral also has a battery configured to provide power to the wireless memory sub-system and a housing configured to hold the wireless memory sub-system and battery. The housing is further configured to physically attach the mobile device peripheral to the mobile device so that the mobile device peripheral and mobile device are carryable together as a single unit. The mobile device peripheral can take the form of a mobile device case or cover, for example. In another embodiment, the mobile device peripheral has a power splitter configured to split power received from a power connector to charge both the battery of the mobile device peripheral and the battery of the mobile device.

Abstract: Apparatus and methods implemented therein are disclosed for recovery of information stored in non-volatile memory of embedded and external solid-state memory devices. The apparatus comprises a memory system. The memory system has a non-volatile memory and a memory controller. The memory controller is coupled to the non-volatile memory. The memory controller is also coupled to a memory interface. The memory controller searches the non-volatile memory to locate initialization information required to initialize the memory controller. The memory controller, in response to failing to successfully locate or execute the initialization information, is configured to transmit an indication via the memory interface.

Abstract: A mobile device peripheral is provided comprising a wireless memory sub-system configured for carrying out wireless data communications with a mobile device. The mobile device peripheral also has a battery configured to provide power to the wireless memory sub-system and a housing configured to hold the wireless memory sub-system and battery. The housing is further configured to physically attach the mobile device peripheral to the mobile device so that the mobile device peripheral and mobile device are carryable together as a single unit. The mobile device peripheral can take the form of a mobile device case or cover, for example. In another embodiment, the mobile device peripheral has a power splitter configured to split power received from a power connector to charge both the battery of the mobile device peripheral and the battery of the mobile device.

Abstract: A memory system or flash card may include memory maintenance scheduling that improves the endurance of memory. Certain parameters, such as temperature, are measured and used for scheduling maintenance. For example, memory maintenance may be performed or postponed depending on the ambient temperature of the card. The memory maintenance operations may be ranked or classified (e.g. in a memory maintenance queue based on priority) to correspond with threshold values of the parameters for a more efficient scheduling of memory maintenance. For example, at a low temperature threshold, only high priority maintenance operations are performed, while at a higher temperature threshold, any priority maintenance operation is performed.

Abstract: A memory system or flash card may include a dynamic system-level process for the management of blocks in the different memory pools. There may be spare blocks available to the pools that are over provisioned to the pool which increases the efficiency of data compaction and helps reduce the average hot count for that pool and compensate for the grown defects. The block wear and grown defects in each memory pool may be tracked so that remaining spare blocks can be re-allocated.