Abstract: A programmable receiver of an integrated circuit is described. The programmable receiver comprises an input; a first programmable receiver circuit coupled to the input, wherein the first programmable receiver circuit has a first pull-up branch and a first pull-down branch and is controlled by a first enable circuit; a second programmable receiver circuit coupled to the input, wherein the second programmable receiver circuit has a second pull-up branch and a second pull-down branch and is controlled by a second enable circuit; and an output stage coupled to the first programmable receiver circuit and the second programmable receiver circuit, wherein the output stage receives an output of one of the first programmable receiver circuit and the second programmable receiver circuit. A method of implementing a programmable receiver in an integrated circuit is also disclosed.

Abstract: A system for voltage buffering within an integrated circuit (IC). The system can include a first buffer having an input and an output. The first buffer can be configured to buffer a received maximum input voltage approximately equal to a positive voltage supply powering the system. The system can include a second buffer having an input and an output. The input of the first buffer can be coupled to the input of the second buffer. The output of the first buffer can be coupled to the output of the second buffer. The second buffer can be configured to buffer a received minimum input voltage approximately equal to a negative voltage supply powering the system. The system further can include a controller configured to selectively enable only the first buffer or the second buffer at any given time.