Abstract: A method disclosed herein includes operating a processor of a system on a chip in a configuration mode until completion of a set of tasks, and operating the processor in a normal operation mode after completion of the set of tasks. During the configuration mode, the method includes performing steps of sending by the processor of configuration information to a configuration programming block, sending by the configuration programming block of the configuration information to one or more electronic components to thereby complete a first subset of the set of tasks, while permitting the processor to complete a second subset of the set of tasks, and sending by the configuration programming block of a notification to the processor after completing the first subset of the set of tasks.

Abstract: A method disclosed herein includes operating a processor of a system on a chip in a configuration mode until completion of a set of tasks, and operating the processor in a normal operation mode after completion of the set of tasks. During the configuration mode, the method includes performing steps of sending by the processor of configuration information to a configuration programming block, sending by the configuration programming block of the configuration information to one or more electronic components to thereby complete a first subset of the set of tasks, while permitting the processor to complete a second subset of the set of tasks, and sending by the configuration programming block of a notification to the processor after completing the first subset of the set of tasks.

Abstract: A configuration arrangement includes a first interface configured to receive configuration information from a master configuration function and a second interface configured to provide at least one output to one or more entities to be configured. Configuration circuitry operates responsive to the configuration information to provide the at least one output, wherein that output controls the configuration of the one or more entities.

Abstract: A configuration arrangement includes a first interface configured to receive configuration information from a master configuration function and a second interface configured to provide at least one output to one or more entities to be configured. Configuration circuitry operates responsive to the configuration information to provide the at least one output, wherein that output controls the configuration of the one or more entities.

Abstract: A debug circuitry includes a first interface configured to receive at least one operational transaction. The debug circuitry further includes a second interface configured to provide an output. Transaction manipulation circuitry operates to manipulate the at least one operational transaction to provide a manipulated operational transaction output passed to the second interface as the output.