Patents by Inventor Gavril Margittai

Gavril Margittai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7612622
    Abstract: Embodiments of the present invention relate to a method and device operable to determine a duty cycle offset of a periodic signal and correct the periodic signal to a desired duty cycle. Embodiment of the present invention may include a ring oscillator circuit. The ring oscillator includes an odd number of ordered inverting elements. One or more of the inverting elements may be an inverting memory element. Each inverting element's output port (except the last inverting element) may be operably connected to the subsequent inverting element's input port. The last inverting element's output port may be operably connected to the first inverting element's input port, thereby forming a chain or ring. A counter may be incremented by oscillations of an output port of an inverting element during a high portion of a periodic signal and may be decremented by oscillations of the output port of the inverting element during a low portion of the periodic signal.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: November 3, 2009
    Assignee: Intel Corporation
    Inventor: Gavril Margittai
  • Publication number: 20090243734
    Abstract: Embodiments of the present invention relate to a method and device operable to determine a duty cycle offset of a periodic signal and correct the periodic signal to a desired duty cycle. Embodiment of the present invention may include a ring oscillator circuit. The ring oscillator includes an odd number of ordered inverting elements. One or more of the inverting elements may be an inverting memory element. Each inverting element's output port (except the last inverting element) may be operably connected to the subsequent inverting element's input port. The last inverting element's output port may be operably connected to the first inverting element's input port, thereby forming a chain or ring. A counter may be incremented by oscillations of an output port of an inverting element during a high portion of a periodic signal and may be decremented by oscillations of the output port of the inverting element during a low portion of the periodic signal.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 1, 2009
    Inventor: Gavril MARGITTAI
  • Patent number: 7202871
    Abstract: An arbitration mechanism for balancing memory requests issued by parallel texture pipelines in a multiple pipeline texture engine. The mechanism ensures that, as polygon textures are processed by a texture engine, all of the memory requests associated with a portion of a given graphics texture are issued by all texture pipelines before any texture pipeline may issue a memory request for another portion of a graphics texture. Thus, the invention balances graphics texture processing between parallel texture pipelines operating together, thereby improving processing efficiency and preventing deadlock conditions.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: April 10, 2007
    Assignee: Intel Corporation
    Inventors: Gavril Margittai, Zeev Sperber, Gabi Malka
  • Publication number: 20040252126
    Abstract: An arbitration mechanism for balancing memory requests issued by parallel texture pipelines in a multiple pipeline texture engine. The mechanism ensures that, as polygon textures are processed by a texture engine, all of the memory requests associated with a portion of a given graphics texture are issued by all texture pipelines before any texture pipeline may issue a memory request for another portion of a graphics texture. Thus, the invention balances graphics texture processing between parallel texture pipelines operating together, thereby improving processing efficiency and preventing deadlock conditions.
    Type: Application
    Filed: May 12, 2004
    Publication date: December 16, 2004
    Inventors: Gavril Margittai, Zeev Sperber, Gabi Malka
  • Patent number: 6781588
    Abstract: An arbitration mechanism for balancing memory requests issued by parallel texture pipelines in a multiple pipeline texture engine. The mechanism ensures that, as polygon textures are processed by a texture engine, all of the memory requests associated with a portion of a given graphics texture are issued by all texture pipelines before any texture pipeline may issue a memory request for another portion of a graphics texture. Thus, the invention balances graphics texture processing between parallel texture pipelines operating together, thereby improving processing efficiency and preventing deadlock conditions.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: August 24, 2004
    Assignee: Intel Corporation
    Inventors: Gavril Margittai, Zeev Sperber, Gabi Malka
  • Publication number: 20030169350
    Abstract: A method and apparatus to position photographed subjects so that the finished product has consistent artistic quality composition is disclosed. Photo templates will be generated implementing proven expert artistic photographic composition methods. The digital camera operator may choose the appropriate template to be displayed on the camera's view window as a superimposed overlay atop the image seen through the view lens. The operator should adjust the subject to mimic the chosen template. In the main embodiment of the invention, said photo template may be stored electronically or directly overlaid on the camera's view window. The composition information available by choosing the photo template can indicate to the camera the region of interest for exposing and focusing, thus eliminating the guesswork of the camera's computer. The primary purpose of the invention is to help the unskilled photographer to take better snapshots. The invention can also be used as a teaching aid in photography classes.
    Type: Application
    Filed: March 7, 2002
    Publication date: September 11, 2003
    Inventors: Avi Wiezel, Gavril A. Margittai
  • Publication number: 20030063092
    Abstract: An arbitration mechanism for balancing memory requests issued by parallel texture pipelines in a multiple pipeline texture engine. The mechanism ensures that, as polygon textures are processed by a texture engine, all of the memory requests associated with a portion of a given graphics texture are issued by all texture pipelines before any texture pipeline may issue a memory request for another portion of a graphics texture. Thus, the invention balances graphics texture processing between parallel texture pipelines operating together, thereby improving processing efficiency and preventing deadlock conditions.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: Gavril Margittai, Zeev Sperber, Gabi Malka