Patents by Inventor Ge Du
Ge Du has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11966612Abstract: A method for migrating data by a source network interface card includes: receiving a first migration instruction; sending a read instruction to the source SSD when receiving the first migration instruction, where the read instruction is used to instruct the source SSD to read the to-be-migrated data into the source migration cache; and sending a second migration instruction to a target intelligent network interface card of the target storage array after the to-be-migrated data is read from the source SSD, where the second migration instruction is used to instruct the target intelligent network interface card to migrate the to-be-migrated data in the source migration cache to the target storage array.Type: GrantFiled: March 4, 2020Date of Patent: April 23, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Ge Du, Yu Hu
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Patent number: 11960749Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.Type: GrantFiled: May 8, 2023Date of Patent: April 16, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Ge Du, Yu Hu, Jiancen Hou
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Publication number: 20230350595Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.Type: ApplicationFiled: May 8, 2023Publication date: November 2, 2023Inventors: Ge Du, Yu Hu, Jiancen Hou
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Patent number: 11644994Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.Type: GrantFiled: August 5, 2020Date of Patent: May 9, 2023Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Ge Du, Yu Hu, Jiancen Hou
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Publication number: 20200363977Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.Type: ApplicationFiled: August 5, 2020Publication date: November 19, 2020Inventors: Ge Du, Yu Hu, Jiancen Hou
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Patent number: 10795599Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.Type: GrantFiled: May 28, 2019Date of Patent: October 6, 2020Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Ge Du, Yu Hu, Jiancen Hou
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Publication number: 20200233601Abstract: A method for migrating data by a source network interface card includes: receiving a first migration instruction; sending a read instruction to the source SSD when receiving the first migration instruction, where the read instruction is used to instruct the source SSD to read the to-be-migrated data into the source migration cache; and sending a second migration instruction to a target intelligent network interface card of the target storage array after the to-be-migrated data is read from the source SSD, where the second migration instruction is used to instruct the target intelligent network interface card to migrate the to-be-migrated data in the source migration cache to the target storage array.Type: ApplicationFiled: March 4, 2020Publication date: July 23, 2020Inventors: Ge Du, Yu Hu
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Publication number: 20190278507Abstract: A host of a storage system is coupled to multiple SSDs. Each SSD is configured with a migration cache, and each SSD corresponds to one piece of access information. The host obtains migration data information of to-be-migrated data in a source SSD, determines a target SSD, and sends a read instruction carrying information about to-be-migrated data and the target SSD to the source SSD. The source SSD reads a data block according to the read instruction from a flash memory of the source SSD into a migration cache of the target SSD. After a read instruction is completed by the SSD, the host sends a write instruction to the target SSD to instruct the target SSD to write the data block in the cache of the target SSD to a flash memory of the target SSD.Type: ApplicationFiled: May 28, 2019Publication date: September 12, 2019Inventors: Ge Du, Yu Hu, Jiancen Hou
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Patent number: 10025745Abstract: A computer system and a method are provided for accessing a peripheral component interconnect express (PCIe) endpoint device. The computer system includes: a processor, a PCIe bus, and an access proxy. The access proxy connects to the processor and the PCIe endpoint device; the processor acquires an operation instruction, where the operation instruction instructs the processor to access the PCIe endpoint device through the access proxy, and send an access request to the access proxy according to the operation instruction; and the access proxy sends a response message of the access request to the processor after receiving the access request sent by the processor. Because the processor does not directly access the PCIe endpoint device to be accessed but completes access through the access proxy, thereby avoiding an MCE reset for the processor.Type: GrantFiled: June 6, 2014Date of Patent: July 17, 2018Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventor: Ge Du
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Patent number: 9785530Abstract: In a Peripheral Component Interconnect Express (PCIe) system, a first PCIe apparatus determines that at least one of lanes of a link between the first PCIe apparatus and a second PCIe apparatus is disabled, wherein the link includes M lanes numbered in a first order. Based upon the determination, the first PCIe apparatus obtains a number N indicating a number of available lanes of the link by performing a lane negotiation with the second PCIe apparatus. Then, a processor determines that N<M/2. Based upon the determination, the first PCIe apparatus re-numbers at least some of the lanes of the link in a reverse order opposite to the first order as instructed by the processor. At last, the first PCIe apparatus continue to perform a negotiation with the second PCIe apparatus to obtain available lanes.Type: GrantFiled: July 22, 2015Date of Patent: October 10, 2017Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventor: Ge Du
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Patent number: 9477632Abstract: A computer system and a method are provided for accessing a peripheral component interconnect express (PCIe) endpoint device. The computer system includes a processor, a PCIe bus, and an access proxy. The access proxy connects to the processor and the PCIe endpoint device; the processor acquires an operation instruction, where the operation instruction instructs the processor to access the PCIe endpoint device through the access proxy, and send an access request to the access proxy according to the operation instruction; and the access proxy sends a response message of the access request to the processor after receiving the access request sent by the processor. Because the processor does not directly access the PCIe endpoint device to be accessed but completes access through the access proxy, thereby avoiding a machine check exception (MCE) reset for the processor.Type: GrantFiled: May 4, 2015Date of Patent: October 25, 2016Assignee: Huawei Technologies Co., Ltd.Inventor: Ge Du
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Publication number: 20150324268Abstract: In a Peripheral Component Interconnect Express (PCIe) system, a first PCIe apparatus determines that at least one of lanes of a link between the first PCIe apparatus and a second PCIe apparatus is disabled, wherein the link includes M lanes numbered in a first order. Based upon the determination, the first PCIe apparatus obtains a number N indicating a number of available lanes of the link by performing a lane negotiation with the second PCIe apparatus. Then, a processor determines that N<M/2. Based upon the determination, the first PCIe apparatus re-numbers at least some of the lanes of the link in a reverse order opposite to the first order as instructed by the processor. At last, the first PCIe apparatus continue to perform a negotiation with the second PCIe apparatus to obtain available lanes.Type: ApplicationFiled: July 22, 2015Publication date: November 12, 2015Inventor: Ge Du
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Publication number: 20140331000Abstract: A computer system and a method are provided for accessing a peripheral component interconnect express (PCIe) endpoint device. The computer system includes: a processor, a PCIe bus, and an access proxy. The access proxy connects to the processor and the PCIe endpoint device; the processor acquires an operation instruction, where the operation instruction instructs the processor to access the PCIe endpoint device through the access proxy, and send an access request to the access proxy according to the operation instruction; and the access proxy sends a response message of the access request to the processor after receiving the access request sent by the processor. Because the processor does not directly access the PCIe endpoint device to be accessed but completes access through the access proxy, thereby avoiding an MCE reset for the processor.Type: ApplicationFiled: June 6, 2014Publication date: November 6, 2014Inventor: Ge Du
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Patent number: 8782317Abstract: A computer system and a method are provided for accessing a peripheral component interconnect express PCIe endpoint device. The computer system includes: a processor, a PCIe bus, and an access proxy. The access proxy connects to the processor and the PCIe endpoint device; the processor acquires an operation instruction, where the operation instruction instructs the processor to access the PCIe endpoint device through the access proxy, and send an access request to the access proxy according to the operation instruction; and the access proxy sends a response message of the access request to the processor after receiving the access request sent by the processor. Because the processor does not directly access the PCIe endpoint device to be accessed but completes access through the access proxy, thereby avoiding an MCE reset for the processor.Type: GrantFiled: December 30, 2013Date of Patent: July 15, 2014Assignee: Huawei Technologies Co., Ltd.Inventor: Ge Du