Abstract: Disclosed herein include a system and a method of synchronizing a slave device to a signal from a master device based on pulse width analysis. The pulse width analysis is a process to sample the signal at a sampling frequency of the slave device, determine varying pulse widths of the sampled signal, and determine frequency of an embedded master clock signal of the signal based on statistical analysis of the varying pulse widths. Advantageously, performing pulse width analysis allows synchronization of a slave device with the embedded master clock signal in a time and cost efficient manner. In one aspect, determining a frequency of the embedded master clock signal and adjusting an internal clock of the slave device according to the determined frequency is faster and more cost efficient than iteratively adjusting the internal clock based on feedback loop based circuitries.

Abstract: Disclosed herein include a system and a method of synchronizing a slave device to a signal from a master device based on pulse width analysis. The pulse width analysis is a process to sample the signal at a sampling frequency of the slave device, determine varying pulse widths of the sampled signal, and determine frequency of an embedded master clock signal of the signal based on statistical analysis of the varying pulse widths. Advantageously, performing pulse width analysis allows synchronization of a slave device with the embedded master clock signal in a time and cost efficient manner. In one aspect, determining a frequency of the embedded master clock signal and adjusting an internal clock of the slave device according to the determined frequency is faster and more cost efficient than iteratively adjusting the internal clock based on feedback loop based circuitries.