Abstract: Control circuit for memory type matrix display with k columns and r rows for k times r display elements, wherein each display element can have one of 2.sup.m brightness levels. This control circuit has a video memory for storing brightness information for the display element of each column. It comprises a column memory for each column. Each column memory including m column shift registers. Each column shift register having an input coupled to a corresponding information input for that column, and an output. A line time shift signal C.sub.s being applied to the shift pulse input of all column shift registers for shifting all column shift registers substantially at the end of each line time. The m output bits thus obtained are sequenced by means of a controlled gate circuit to produce a sequence of output bits at the information output of that column. This gate circuit is controlled such that each output bit lasts a predetermined part of the subsequent video line time.

Abstract: A modulator circuit for a matrix display device, the modulator circuit having pulse width and pulse amplitude control. The current amplitude for a selected picture element (row address-column address) varies during the pulse width of an excitation pulse in correspondence with the number of counting positions of a counting circuit used for determining the pulse width.A column conductor has an associated column excitation circuit in which a counting circuit for determining the excitation pulse width controls excitation switches which pass selectively currents from current source I.sub.A . . . 64I.sub.A of a current source circuit to the column conductor. The initial setting of the counting circuit determines the excitation pulse width, and the count positions of the counting circuit select the currents to be passed to the column conductor as the counting circuit is stepped by clock pulses to measure the duration of the excitation pulse.

Abstract: In a matrix of display elements arranged in rows and columns having row scanning and column selection, all display elements which are connected to a scanned row conductor are always ignited such that the non-selected display elements of that row receive a low quiescent current through quiescent current supply circuits in the column selection circuits and the selected display elements receive a higher display current through selection circuits in the column selection circuits.The low quiescent currents reduce the ignition-voltage required for the next following row to be scanned while a high contrast is produced between the selected and non-selected display elements.

Abstract: A saving in column memory elements while preserving a stable display with a gas discharge television display device is obtained if a plurality of bits of the digital video information which is entered in the line trace period is passed from the line memory circuit to the relevant column electrode in the line blanking period while bypassing a column memory circuit. The display elements are excited only once during a line period at the beginning of the line period.