Patents by Inventor Geetha L. Narayan

Geetha L. Narayan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100004018
    Abstract: A method and system for adjusting the amplitude and phase characteristics of wireless communication signals generated by an analog radio transmitter, based on transmit power control (TPC) signals received by a base station (BS) and known characteristics of a power amplifier (PA) included in the transmitter. A digital pre-distortion compensation module, having real and imaginary signal paths, receives and processes real and imaginary signal components used to generate the wireless communication signal. The phase and amplitude characteristics of the wireless communication signal are controlled in response to the TPC signals, such that impaired amplitude and phase characteristics of the PA are corrected.
    Type: Application
    Filed: September 14, 2009
    Publication date: January 7, 2010
    Applicant: INTERDIGITAL TECHNOLOGY CORPORATION
    Inventors: Alpaslan Demir, Leonid Kazakevich, Geetha L. Narayan
  • Publication number: 20090274248
    Abstract: A method and apparatus for contention free interleaving are disclosed. A single memory configured to use an address scheme wherein the most significant bits (MSBs) indicate which word in memory stores an interleaved piece of data. The least significant bits (LSBs) are used to calculate an index that identifies a specific soft-in/soft-out (SISO) decoder associated with a sub-word of the retrieved data. Using an interleaved address generator, the extrinsic data may be written into the memory in sequential order, but read out from the memory in interleaved order, effectively de-interleaving the data so it may be decoded. The generated interleaved address is used by SISO selector circuit which controls a multiplexer that routes the sub-word to its appropriate SISO decoder. The same address generator may be used to write interleaved extrinsic data from SISOs by reordering the sub-words, allowing the extrinsic data to be read in sequential order.
    Type: Application
    Filed: April 23, 2009
    Publication date: November 5, 2009
    Applicant: INTERDIGITAL PATENT HOLDINGS, INC.
    Inventors: Edward L. Hepler, Geetha L. Narayan