Abstract: A semiconductor apparatus is provided which includes a lateral high-voltage semiconductor device which comprises a silicon substrate, a pair of main electrodes formed on the silicon substrate, and a silicon oxide film formed on the silicon substrate, such that at least a part of the silicon oxide film is located between the main electrodes. The semiconductor device further includes a voltage withstanding structure formed on the silicon oxide film, which structure includes a first silicon nitride film having a refractive index of not lower than 2.8, and a second silicon nitride film formed on the first silicon nitride film and having a refractive index of not higher than 2.2.

Abstract: The invention provides a semiconductor device, manufactured with low manufacturing costs, that prevents the breakdown voltage from lowering.

Abstract: A semiconductor device includes a stable high withstand voltage lateral MISFET device which suppresses a gradual withstand voltage drop under high voltage and humidity conditions. In a MISFET device with a 700V breakdown drain voltage, the length of extension Mc (&mgr;m) of a field plate FP1 the source side end of a thermal oxidization film, and the total insulating film thickness Tox (&mgr;m) directly below the extending tip of the field plate FP1, are greater than or equal to lower limit values Mcmin, Tcmin. As a result, even if there is growth in charge accumulation at the interface of the mold resin, the field strength at a point B and point C is always lower than at a point A, which suppresses a gradual withstand voltage drop and a gradual ON current drop, whereby it becomes possible to realize a withstand voltage of 700V.

Abstract: A semiconductor apparatus is provided which includes a lateral high-voltage semiconductor device which comprises a silicon substrate, a pair of main electrodes formed on the silicon substrate, and a silicon oxide film formed on the silicon substrate, such that at least a part of the silicon oxide film is located between the main electrodes. The semiconductor device further includes a voltage withstanding structure formed on the silicon oxide film, which structure includes a first silicon nitride film having a refractive index of not lower than 2.8, and a second silicon nitride film formed on the first silicon nitride film and having a refractive index of not higher than 2.2.

Abstract: The invention provides a semiconductor device, manufactured with low manufacturing costs, that prevents the breakdown voltage from lowering.

Abstract: A semiconductor apparatus is provided which includes a lateral high-voltage semiconductor device which comprises a silicon substrate, a pair of main electrodes formed on the silicon substrate, and a silicon oxide film formed on the silicon substrate, such that at least a part of the silicon oxide film is located between the main electrodes. The semiconductor device further includes a voltage withstanding structure formed on the silicon oxide film, which structure includes a first silicon nitride film having a refractive index of not lower than 2.8, and a second silicon nitride film formed on the first silicon nitride film and having a refractive index of not higher than 2.2.

Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.

Abstract: A high voltage integrated circuit is provided which includes a first conductivity type semiconductor substrate, a first conductivity type isolation region that extends continuously from the first conductivity type semiconductor substrate, a substrate electrode formed on a surface of the first conductivity type isolation region, a second conductivity type island-like region that is formed on the first conductivity type semiconductor substrate, such that the entire periphery of the island-like region is surrounded by the first conductity type isolation region, and a plurality of high voltage MOSFETs that are connected to a common power source and operate independently of each other.

Abstract: A semiconductor device with a metal-insulator-semiconductor transistor and a limiter or sacrifice diode has predetermined breakdown voltage and constant withstand voltage. The device includes a special well region underlying a drain portion or contacting an edge of a drain portion.

Abstract: After forming a gate oxide film on the surface side of a single crystalline silicon substrate, a first polycrystalline silicon layer is subsequently formed. After that, portions of polycrystalline silicon layers are left in each gate electrode formation region of a high voltage drive circuit. Then, the gate oxide film in a low voltage drive circuit side is removed while maintaining this state. Then, after forming a gate oxide film on those surface sides, a polycrystalline silicon layer is subsequently formed in the surface side. After that, impurities are introduced into the polycrystalline silicon layer to provide it with electrical conduction, and then portions of polycrystalline silicon layers are left.

Abstract: After forming a gate oxide film on the surface side of a single crystalline silicon substrate, a first polycrystalline silicon layer is subsequently formed. After that, portions of polycrystalline silicon layers are left in each gate electrode formation region of a high voltage drive circuit. Then, the gate oxide film in a low voltage drive circuit side is removed while maintaining this state. Then, after forming a gate oxide film on those surface sides, a polycrystalline silicon layer is subsequently formed in the surface side. After that, impurities are introduced into the polycrystalline silicon layer to provide it with electrical conduction, and then portions of polycrystalline silicon layers are left.

Abstract: In a low voltage drive circuit section of a semiconductor integrated circuit, the gate oxide films are approximately 250 .ANG., and a low voltage N-channel IGFET and a low voltage P-channel IGFET are operable at high speed and driven at a low voltage. In a high voltage driven circuit section, the gate oxide films are approximately 1500 .ANG., and a high voltage N-channel IGFET and a high voltage P-channel IGFET are designed to have a high breakdown voltage performance. In a low gate voltage/high voltage drive circuit section, the gate oxide films are approximately 250 .ANG., and a high voltage N-channel IGFET is driven at a low gate voltage and operable at high speed. The high voltage N-channel IGFET of the low gate voltage/high voltage drive circuit section has an offset structure including a drain diffusion layer of low concentration, such that the breakdown voltage of the drain is greatly increased.

Abstract: A high voltage MIS transistor includes a well region of a second conduction type formed by a step of injecting ions from the surface side of a semiconductor substrate of a first conduction type and a thermal diffusion step after the ion injecting step; an MIS part including a base layer of a first conduction type formed in one end portion of the well region, a base contact layer of a first conduction type which is formed in the base layer of a first conduction type and to which an emitter potential is applied, and a gate electrode provided so as to extend from an emitter layer of a second conduction type to the well region through an insulation gate film; and, a collector part including a base layer of a second conduction type formed in the other end portion of the well region, a collector layer of a first conduction type formed in the base layer of a second conduction type, and a high concentration contact layer of a first conduction type which is formed in the collector layer and to which a collector potent

Abstract: A semiconductor integrated circuit device is provided in which a highly reliable and low cost intelligent power semiconductor is mounted on the same substrate as that of a control circuit having a logic element, such as a low withstand voltage CMOS etc., and high withstand voltage and high current output MIS field effect transistor. A high withstand voltage MOSFET is composed of a vertical MOS portion 25 formed in one side of a laterally widened well layer 2 and a drain portion formed in the other side thereof and a second base layer 4 is formed on the surface of the well layer 2. Accordingly, a depletion layer widened just under the MOS portion 25 and the second base layer 4 develops a JFET effect at OFF time thereby realizing a high withstand voltage and reliability is provided since the generation of hot carriers can be prevented by the second base layer 4.