Patents by Inventor Gene Cloud

Gene Cloud has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Self-test circuit for memory integrated circuits
    Patent number: 5982682
    Abstract: A sense amplifier senses and stores data from a memory cell in an array of memory cells arranged in rows and columns. The sense amplifier includes a sense circuit having a pair of first and second complementary digit lines which senses a voltage differential between the first and second complementary digit lines and in response to the sensed voltage differential drives the first and second complementary digit lines to voltage levels corresponding to complementary logic states. An isolation circuit is coupled between the pair of first and second complementary digit lines of the sense amplifier and a pair of first and second complementary digit lines associated with a column of memory cells. The isolation circuit is operable to couple the first complementary digit line of the sense amplifier to the first complementary digit line of the column of memory cells and the second complementary digit line of the sense amplifier to the secondary complementary digit line of the column of memory cells.
    Type: Grant
    Filed: March 12, 1998
    Date of Patent: November 9, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Leland R. Nevill, Ray Beffa, Warren M. Farnworth, Gene Cloud
  • Self-test circuit for memory integrated circuits
    Patent number: 5754486
    Abstract: A sense amplifier senses and stores data from a memory cell in an array of memory cells arranged in rows and columns. The sense amplifier includes a sense circuit having a pair of first and second complementary digit lines which senses a voltage differential between the first and second complementary digit lines and in response to the sensed voltage differential drives the first and second complementary digit lines to voltage levels corresponding to complementary logic states. An isolation circuit is coupled between the pair of first and second complementary digit lines of the sense amplifier and a pair of first and second complementary digit lines associated with a column of memory cells. The isolation circuit is operable to couple the first complementary digit line of the sense amplifier to the first complementary digit line of the column of memory cells and the second complementary digit line of the sense amplifier to the secondary complementary digit line of the column of memory cells.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: May 19, 1998
    Assignee: Micron Technology, Inc.
    Inventors: Leland R. Nevill, Ray Beffa, Warren M. Farnworth, Gene Cloud
  • Wrist support for expandable keyboards
    Patent number: 5588759
    Abstract: An expandable keyboard with three degrees of freedom in the translation assembly which allows the lower keyboard section to move: forward, the second degree of freedom; up, the third degree of freedom; and out, the first degree of freedom, to expand the keyboard. In the collapsed position, the lower keyboard section rests below a fixed wrist support which forms a portion of the housing for the device.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: December 31, 1996
    Assignee: Micron Technology, Inc.
    Inventor: Gene Cloud