Abstract: The disclosed circuit employs a single programmable timer and address decoder which identifies a plurality of bursts received from other stations in a TDMA communications network by means by identifying their origin addresses, and then starts associated timing intervals in the programmable timer for each burst. The instant when the intervals being timed terminate, corresponds approximately to the instant at which the local station should commence its transmission burst. The programmable timer and synchronizer associates each of a plurality of timing intervals with each of the plurality of transmitting stations in the TDMA network, and terminates each respective interval at approximately the same instant in a given local station, thus allowing the time for commencement of the local station's transmission burst to be reliably determined without regard for the participation of any more than one other of the plurality of transmitting stations in the TDMA network.

Abstract: A time division multiple access satellite communication architecture is disclosed to achieve a relatively simple control procedure for permitting multiple computers to establish peer coupled transmission paths for high speed transfer by dynamically allocating satellite communication facilities in a sequentially shared broadcast mode. Each sequentially established CPU-to-CPU logical link takes the form of a point-to-multipoint sub-network which incorporates a standard data link control protocol for the control of information transfer. The function of the primary station is sequentially passed from station to station within the network and as each station assumes primary control of its logical point-to-multipoint circuit, other stations conform to the secondary role for that logical link configuration.