Abstract: A vision transformer network having extremely low latency and usable on mobile devices, such as smart eyewear devices and other augmented reality (AR) and virtual reality (VR) devices. The transformer network processes an input image, and the network includes a convolution stem configured to patch embed the image. A first stack of stages including at least two stages of 4-Dimension (4D) metablocks (MBs) (MB4D) follow the convolution stem. A second stack of stages including at least two stages of 3-Dimension MBs (MB3D) follow the MB4D stages. Each of the MB4D stages and each of the MB3D stages include different layer configurations, and each of the MB4D stages and each of the MB3D stages include a token mixer. The MB3D stages each additionally include a multi-head self attention (MHSA) processing block.

Abstract: A layer freezing and data sieving technique used in a sparse training domain for object recognition, providing end-to-end dataset-efficient training. The layer freezing and data sieving methods are seamlessly incorporated into a sparse training algorithm to form a generic framework. The generic framework consistently outperforms prior approaches and significantly reduces training floating point operations per second (FLOPs) and memory costs while preserving high accuracy. The reduction in training FLOPs comes from three sources: weight sparsity, frozen layers, and a shrunken dataset. The training acceleration depends on different factors, e.g., the support of the sparse computation, layer type and size, and system overhead. The FLOPs reduction from the frozen layers and shrunken dataset leads to higher actual training acceleration than weight sparsity.

Abstract: A vision transformer network having extremely low latency and usable on mobile devices, such as smart eyewear devices and other augmented reality (AR) and virtual reality (VR) devices. The transformer network processes an input image, and the network includes a convolution stem configured to patch embed the image. A first stack of stages including at least two stages of 4-Dimension (4D) metablocks (MBs) (MB4D) follow the convolution stem. A second stack of stages including at least two stages of 3-Dimension MBs (MB3D) follow the MB4D stages. Each of the MB4D stages and each of the MB3D stages include different layer configurations, and each of the MB4D stages and each of the MB3D stages include a token mixer. The MB3D stages each additionally include a multi-head self attention (MHSA) processing block.

Abstract: A DC-DC power supply control circuit includes: a voltage stabilizing diode, a first resistor, a second resistor, a third resistor, a first triode and a second triode. Two ends of the first resistor are connected with an input end and an enable end of the DC-DC power supply respectively. Two ends of the second resistor are connected with the enable end and a collector of the second triode. A base electrode and an emitting electrode of the second triode are connected with a collector of the first triode and ground respectively. A negative electrode end and a positive electrode end of the voltage stabilizing diode are connected with an output end of the DC-DC power supply and a base electrode of the first triode respectively. Two ends of the third resistor are connected with the base electrode and the ground respectively. An emitting electrode of the first triode is grounded.

Abstract: A DC-DC power supply control circuit includes: a voltage stabilizing diode, a first resistor, a second resistor, a third resistor, a first triode and a second triode. Two ends of the first resistor are connected with an input end and an enable end of the DC-DC power supply respectively. Two ends of the second resistor are connected with the enable end and a collector of the second triode. A base electrode and an emitting electrode of the second triode are connected with a collector of the first triode and ground respectively. A negative electrode end and a positive electrode end of the voltage stabilizing diode are connected with an output end of the DC-DC power supply and a base electrode of the first triode respectively. Two ends of the third resistor are connected with the base electrode and the ground respectively. An emitting electrode of the first triode is grounded.