Patents by Inventor Geno Valente

Geno Valente has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8760573
    Abstract: A scaling engine, blending mechanism, memory controller, frame buffer and video driver are included within a semiconductor, such as a Field Programmable Gate Array (FPGA), to provide broadcasting of signals at a high resolution format by combining two or more low resolution video signals to create a high resolution signal in real-time High Definition format, such as 1080 p. The high resolution signals can be concurrently displayed as one or more image areas on a display device in any contemplated size, number and arrangement.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: June 24, 2014
    Inventors: Geno Valente, Mary Beth Valente
  • Publication number: 20130125184
    Abstract: A scaling engine, blending mechanism, memory controller, frame buffer and video driver are included within a semiconductor, such as a Field Programmable Gate Array (FPGA), to provide broadcasting of signals at a high resolution format by combining two or more low resolution video signals to create a high resolution signal in real-time High Definition format, such as 1080 p. The high resolution signals can be concurrently displayed as one or more image areas on a display device in any contemplated size, number and arrangement.
    Type: Application
    Filed: January 7, 2013
    Publication date: May 16, 2013
    Inventors: Geno Valente, Mary Beth Valente
  • Patent number: 8350961
    Abstract: A scaling engine, blending mechanism, memory controller, frame buffer and video driver are included within a semiconductor, such as a Field Programmable Gate Array (FPGA), to provide broadcasting of signals at a high resolution format by combining two or more low resolution video signals to create a high resolution signal in real-time High Definition format, such as 1080p. The high resolution signals can be concurrently displayed as one or more image areas on a display device in any contemplated size, number and arrangement.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: January 8, 2013
    Inventors: Geno Valente, Mary Beth Valente
  • Publication number: 20070252912
    Abstract: A scaling engine, blending mechanism, memory controller, frame buffer and video driver are included within a semiconductor, such as a Field Programmable Gate Array (FPGA), to provide broadcasting of signals at a high resolution format by combining two or more low resolution video signals to create a high resolution signal in real-time High Definition format, such as 1080p. The high resolution signals can be concurrently displayed as one or more image areas on a display device in any contemplated size, number and arrangement.
    Type: Application
    Filed: April 24, 2007
    Publication date: November 1, 2007
    Inventors: Geno Valente, Mary Beth Valente