Patents by Inventor Genshirou Kawachi
Genshirou Kawachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10867569Abstract: A display device includes: pixel transistors electrically connected to the respective source lines and the respective gate lines; a monitor transistor in which a lead-out wiring of a drain electrode is electrically connected to a first external terminal, a lead-out wiring of a gate electrode is electrically connected to a second external terminal, and a lead-out wiring of a source electrode is electrically connected to a third external terminal; a reference transistor in which a lead-out wiring of a drain electrode is electrically connected to a fourth external terminal, a lead-out wiring of a gate electrode is electrically connected to a fifth external terminal, and a lead-out wiring of a source electrode is electrically connected to a sixth external terminal; and a detector electrically connected to the third external terminal and the sixth external terminal to detect a shift amount of a threshold voltage of the monitor transistor.Type: GrantFiled: September 18, 2019Date of Patent: December 15, 2020Assignee: Panasonic Liquid Crystal Display Co., Ltd.Inventors: Genshirou Kawachi, Kuniaki Amano, Ryutaro Oke, Daisuke Kajita
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Publication number: 20200013358Abstract: A display device includes: pixel transistors electrically connected to the respective source lines and the respective gate lines; a monitor transistor in which a lead-out wiring of a drain electrode is electrically connected to a first external terminal, a lead-out wiring of a gate electrode is electrically connected to a second external terminal, and a lead-out wiring of a source electrode is electrically connected to a third external terminal; a reference transistor in which a lead-out wiring of a drain electrode is electrically connected to a fourth external terminal, a lead-out wiring of a gate electrode is electrically connected to a fifth external terminal, and a lead-out wiring of a source electrode is electrically connected to a sixth external terminal; and a detector electrically connected to the third external terminal and the sixth external terminal to detect a shift amount of a threshold voltage of the monitor transistor.Type: ApplicationFiled: September 18, 2019Publication date: January 9, 2020Inventors: Genshirou KAWACHI, Kuniaki AMANO, Ryutaro OKE, Daisuke KAJITA
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Patent number: 10509288Abstract: A liquid crystal display device includes a first substrate formed with a first gate line, a first source line, a first thin film transistor including a first channel region and a first semiconductor layer, and a second semiconductor layer electrically insulated from the first semiconductor layer, a second substrate disposed opposite to the first substrate, and a first liquid crystal layer disposed between the first substrate and the second substrate. The second semiconductor layer is disposed between the first thin film transistor and the first liquid crystal layer, and overlaps at least a part of the first channel region of the first thin film transistor in planar view.Type: GrantFiled: March 8, 2018Date of Patent: December 17, 2019Assignee: Panasonic Liquid Crystal Display Co., Ltd.Inventors: Daisuke Kajita, Genshirou Kawachi, Teruhisa Nakagawa
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Publication number: 20180259819Abstract: A liquid crystal display device includes a first substrate formed with a first gate line, a first source line, a first thin film transistor including a first channel region and a first semiconductor layer, and a second semiconductor layer electrically insulated from the first semiconductor layer, a second substrate disposed opposite to the first substrate, and a first liquid crystal layer disposed between the first substrate and the second substrate. The second semiconductor layer is disposed between the first thin film transistor and the first liquid crystal layer, and overlaps at least a part of the first channel region of the first thin film transistor in planar view.Type: ApplicationFiled: March 8, 2018Publication date: September 13, 2018Inventors: Daisuke KAJITA, Genshirou KAWACHI, Teruhisa NAKAGAWA
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Patent number: 9929274Abstract: Methods of fabricating a thin-film transistor are provided. The methods include forming a gate electrode above a substrate, a gate insulating layer above the gate electrode, a non-crystalline silicon layer above the gate insulating layer, and a channel protective layer above the non-crystalline silicon layer. The non-crystalline silicon layer and the channel protective layer are processed to form a projecting part. The projecting part has an upper layer composed of the channel protective layer and a lower layer composed of the non-crystalline silicon layer. The projecting part and portions of the non-crystalline silicon layer on sides of the projecting part are irradiated with a laser beam to crystallize at least the non-crystalline silicon layer in the projecting part. An absorptance of the non-crystalline silicon layer for the laser beam is greater in the projecting part than in the portions on the sides of the projecting part.Type: GrantFiled: December 20, 2016Date of Patent: March 27, 2018Assignees: JOLED INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.Inventors: Hiroshi Hayashi, Takahiro Kawashima, Genshirou Kawachi
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Publication number: 20170104103Abstract: Methods of fabricating a thin-film transistor are provided. The methods include forming a gate electrode above a substrate, a gate insulating layer above the gate electrode, a non-crystalline silicon layer above the gate insulating layer, and a channel protective layer above the non-crystalline silicon layer. The non-crystalline silicon layer and the channel protective layer are processed to form a projecting part. The projecting part has an upper layer composed of the channel protective layer and a lower layer composed of the non-crystalline silicon layer. The projecting part and portions of the non-crystalline silicon layer on sides of the projecting part are irradiated with a laser beam to crystallize at least the non-crystalline silicon layer in the projecting part. An absorptance of the non-crystalline silicon layer for the laser beam is greater in the projecting part than in the portions on the sides of the projecting part.Type: ApplicationFiled: December 20, 2016Publication date: April 13, 2017Applicants: JOLED INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTDInventors: Hiroshi HAYASHI, Takahiro KAWASHIMA, Genshirou KAWACHI
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Patent number: 9431543Abstract: A thin-film semiconductor device includes: a substrate; a gate electrode above the substrate; a gate insulation film above the gate electrode; a channel layer above the gate insulation film, the channel layer having a raised part; a channel protection layer over the raised part of the channel layer, the channel protection layer comprising an organic material, and the organic material including silicon, oxygen, and carbon; an interface layer at an interface between a top surface of the raised part of the channel layer and the channel protection layer, and comprises at least carbon and silicon that derive from the organic material; and a source electrode and a drain electrode each provided over a top surface and a side surface the channel protection layer, a side surface of the interface layer, a side surface of the raised part of the channel layer, and a top surface of the channel layer.Type: GrantFiled: February 26, 2013Date of Patent: August 30, 2016Assignees: JOLED INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.Inventors: Hiroshi Hayashi, Takahiro Kawashima, Genshirou Kawachi
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Patent number: 9000437Abstract: A thin-film semiconductor device according to the present disclosure includes: a substrate; a gate electrode formed above the substrate; a gate insulating film formed on the gate electrode; a channel layer that is formed of a polycrystalline semiconductor layer on the gate insulating film; an amorphous semiconductor layer formed on the channel layer and having a projecting shape in a surface; and a source electrode and a drain electrode that are formed above the amorphous semiconductor layer, and a first portion included in the amorphous semiconductor layer and located closer to the channel layer has a resistivity lower than a resistivity of a second portion included in the amorphous semiconductor layer and located closer to the source and drain electrodes.Type: GrantFiled: March 21, 2012Date of Patent: April 7, 2015Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.Inventors: Hiroshi Hayashi, Takahiro Kawashima, Genshirou Kawachi
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Patent number: 8841673Abstract: A thin-film transistor device includes: a gate electrode above a substrate; a gate insulating film on the gate electrode; a crystalline silicon thin film above the gate insulating film; a first semiconductor film above the crystalline silicon thin film; a pair of second semiconductor films above the first semiconductor film; a source electrode over one of the second semiconductor films; and a drain electrode over an other one of the second semiconductor films. The first semiconductor film is provided on the crystalline silicon thin film. A relationship ECP<EC1 is satisfied where ECP and EC1 denote energy levels at lower ends of conduction bands of the crystalline silicon thin film and the first semiconductor film, respectively.Type: GrantFiled: January 16, 2013Date of Patent: September 23, 2014Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.Inventors: Arinobu Kanegae, Takahiro Kawashima, Hiroshi Hayashi, Genshirou Kawachi
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Patent number: 8841678Abstract: A thin-film transistor device includes: a gate electrode above a substrate; a gate insulating film on the gate electrode; a crystalline silicon thin film including a channel region which is provided on the gate insulating film; semiconductor films on at least the channel region; an insulating film made of an organic material which is provided over the channel region and above the semiconductor films; a source electrode over at least an end portion of the insulating film; and a drain electrode over at least the other end portion of the insulating film and facing the source electrode. The semiconductor films include at least a first semiconductor film and a second semiconductor film provided on the first semiconductor film. A relationship ECP<EC1 is satisfied where ECP and EC1 denote energy levels at lower ends of conduction bands of the crystalline silicon thin film and the first semiconductor film, respectively.Type: GrantFiled: January 9, 2013Date of Patent: September 23, 2014Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.Inventors: Arinobu Kanegae, Takahiro Kawashima, Hiroshi Hayashi, Genshirou Kawachi
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Patent number: 8664662Abstract: A thin-film transistor array includes first and second bottom-gate transistors, a passivation film, a conductive oxide film below the passivation film, and a relay electrode between a first conductive material in a same layer as a first electrode of the first transistor and a second conductive material in an electroluminescence layer. A first line is in a layer lower than the passivation film and a second line is above the passivation film. A terminal to which an external signal is input is provided in a periphery of the substrate in the same layer as the first electrode. The conductive oxide film covers an upper surface of the terminal and is between the relay electrode and the first conductive material. The relay electrode is formed in a same layer and comprises a same material as the second line.Type: GrantFiled: June 4, 2012Date of Patent: March 4, 2014Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.Inventors: Shinya Ono, Arinobu Kanegae, Genshirou Kawachi
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Publication number: 20130082270Abstract: A thin-film transistor array includes first and second bottom-gate transistors, a passivation film, a conductive oxide film below the passivation film, and a relay electrode between a first conductive material in a same layer as a first electrode of the first transistor and a second conductive material in an electroluminescence layer. A first line is in a layer lower than the passivation film and a second line is above the passivation film. A terminal to which an external signal is input is provided in a periphery of the substrate in the same layer as the first electrode. The conductive oxide film covers an upper surface of the terminal and is between the relay electrode and the first conductive material. The relay electrode is formed in a same layer and comprises a same material as the second line.Type: ApplicationFiled: June 4, 2012Publication date: April 4, 2013Applicants: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., PANASONIC CORPORATIONInventors: Shinya ONO, Arinobu KANEGAE, Genshirou KAWACHI
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Publication number: 20130037806Abstract: A thin-film semiconductor device according to the present disclosure includes: a substrate; a gate electrode formed above the substrate; a gate insulating film formed on the gate electrode; a channel layer that is formed of a polycrystalline semiconductor layer on the gate insulating film; an amorphous semiconductor layer formed on the channel layer and having a projecting shape in a surface; and a source electrode and a drain electrode that are formed above the amorphous semiconductor layer, and a first portion included in the amorphous semiconductor layer and located closer to the channel layer has a resistivity lower than a resistivity of a second portion included in the amorphous semiconductor layer and located closer to the source and drain electrodes.Type: ApplicationFiled: March 21, 2012Publication date: February 14, 2013Applicants: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., PANASONIC CORPORATIONInventors: Hiroshi HAYASHI, Takahiro KAWASHIMA, Genshirou KAWACHI
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Publication number: 20130001572Abstract: A thin-film transistor used for a display device includes a gate electrode formed on an insulating substrate; a gate insulating film formed on the substrate so as to cover the gate electrode; a semiconductor layer composed of first semiconductor layer and second semiconductor layer formed on the gate insulating film; an ohmic contact layer formed on the semiconductor layer; and a source electrode and a drain electrode formed on the ohmic contact layer so as to be spaced from each other. The transistor further includes an etching stopper made of spin-on glass (SOG) on a channel-forming region of the semiconductor layer.Type: ApplicationFiled: September 14, 2012Publication date: January 3, 2013Applicant: Panasonic CorporationInventors: Eiichi SATOH, Genshirou Kawachi, Takahiro Kawashima
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Publication number: 20130001559Abstract: A substrate; a gate electrode formed above the substrate; a gate insulating film formed above the gate electrode; a crystalline silicon semiconductor layer formed above the gate insulating film; an amorphous silicon semiconductor layer formed above the crystalline silicon semiconductor layer; an organic protective film made of an organic material and formed above the amorphous silicon semiconductor layer; and a source electrode and a drain electrode formed above the amorphous silicon semiconductor layer interposing the organic protective film are included, and a charge density of the negative carriers in the amorphous silicon semiconductor layer is at least 3×1011 cm?2.Type: ApplicationFiled: September 7, 2012Publication date: January 3, 2013Applicants: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., PANASONIC CORPORATIONInventors: Yuji KISHIDA, Takahiro KAWASHIMA, Arinobu KANEGAE, Genshirou KAWACHI
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Patent number: 6891588Abstract: In a liquid crystal display device having a transmissive display region and a reflective display region within a unit pixel, the present invention disposes an optical reflection layer having an almost rectangular planar shape as extended in the unit pixel elongate direction at substantially a central portion midway between two neighboring signal electrodes, defines almost rectangular regions between the optical reflection layer and two signal electrodes adjacent thereto as the transmissive display region in the unit pixel, and forms a pixel electrode at a level spaced from that of the optical reflection layer by a dielectric film so as to cover the entire surface of the unit pixel, so that power consumption of the liquid crystal display device is reduced while image quality thereof is improved.Type: GrantFiled: April 16, 2002Date of Patent: May 10, 2005Assignee: Hitachi, Ltd.Inventors: Genshirou Kawachi, Toshio Miyazawa, Tetsuya Nagata, Atsushi Hasegawa
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Publication number: 20020149724Abstract: In a liquid crystal display device having a transmissive display region and a reflective display region within a unit pixel, the present invention disposes an optical reflection layer having an almost rectangular planar shape as extended in the unit pixel elongate direction at substantially a central portion midway between two neighboring signal electrodes, defines almost rectangular regions between the optical reflection layer and two signal electrodes adjacent thereto as the transmissive display region in the unit pixel, and forms a pixel electrode at a level spaced from that of the optical reflection layer by a dielectric film so as to cover the entire surface of the unit pixel, so that power consumption of the liquid crystal display device is reduced while image quality thereof is improved.Type: ApplicationFiled: April 16, 2002Publication date: October 17, 2002Applicant: Hitachi, Ltd.Inventors: Genshirou Kawachi, Toshio Miyazawa, Tetsuya Nagata, Atsushi Hasegawa