Patents by Inventor Geoff A. Dillon

Geoff A. Dillon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Input current limiting for redundant power supply loss on modular platforms
    Patent number: 12072746
    Abstract: An information handling system includes first and second power supplies, a chassis BMC, and a sled. The power supplies each assert a power good indication when the power supply is providing power on a power rail. The chassis BMC receives the power good indications and asserts a loss of redundancy indication when one of the power good indications is deasserted. The sled includes a sled BMC and a host processing system. The sled receives the loss of redundancy indication and in response, asserts a processor over temperature indication to the host processing system. When both power good indications are asserted, the chassis BMC directs the sled BMC to operate the host processing system in accordance with a normal operation sled current limit. When one of the power good indications is deasserted, the chassis BMC directs the sled BMC to operate the host processing system in accordance with a reduced power operation sled current limit.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: August 27, 2024
    Assignee: Dell Products L.P.
    Inventors: Craig A. Klein, Geoff A. Dillon, Alexander J. Hoganson
  • INPUT CURRENT LIMITING FOR REDUNDANT POWER SUPPLY LOSS ON MODULAR PLATFORMS
    Publication number: 20230418349
    Abstract: An information handling system includes first and second power supplies, a chassis BMC, and a sled. The power supplies each assert a power good indication when the power supply is providing power on a power rail. The chassis BMC receives the power good indications and asserts a loss of redundancy indication when one of the power good indications is deasserted. The sled includes a sled BMC and a host processing system. The sled receives the loss of redundancy indication and in response, asserts a processor over temperature indication to the host processing system. When both power good indications are asserted, the chassis BMC directs the sled BMC to operate the host processing system in accordance with a normal operation sled current limit. When one of the power good indications is deasserted, the chassis BMC directs the sled BMC to operate the host processing system in accordance with a reduced power operation sled current limit.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: Craig A. Klein, Geoff A. Dillon, Alexander J. Hoganson