Abstract: In a telecommunications system in which narrowband or guiding services already exist, different service rates, either fixed or variable may be required. A further service switch is connected in parallel with the existing narrowband or guiding switch, the further service switch being similarly controlled in response to the guiding signalling.

Abstract: A reconfigurable switch memory which is applicable to time switches and space switches enables two very different time switching functions to be efficiently implemented by one type of switching unit. A reconfigurable switching device is provided which, for instance, can work in either one bit or five bit mode, the granularity of the switch being varied.

Abstract: A broadband multiport coherent optic data switch comprises a passive optic combiner/splitter, a plurality of port units and a switch control unit connected thereto, each port unit having a coherent optic source tuned to a respective optic frequency, the output of each source carrying thereon control information, including control information received from the control unit, together with switched data, the outputs of the sources being combined and distributed to all of the plurality of port units.

Abstract: Synchronization of a receiving termination of a telecommunications system with an incoming data stream is carried out from a synchronization signal carried with the data stream. It is possible that a "mimic" of the synchronization signal may occur within the data stream. Two frame alignment detectors operate in worker/standby relationship, one being locked to a detected synchronization signal and the second searching for an alternative signal. Verification is carried out using a cyclic redundancy check.

Abstract: The invention concerns a method of pointer processing a digital TDM data stream at a node of a synchronous SDH transmission network so as to justify the data stream on transmission, the data stream having a specified line frequency and being composed of frames, each frame containing a reference word, and the node of the transmission network having a node frequency, the method comprising storing the incoming data stream in a buffer store at the node, using the line reference of the incoming data stream to extract a data pointer from the data stream for each frame, which data pointer indicates the location of the reference word of that frame in the buffer store, and characterized in that a timing pointer is extracted from the incoming data stream utilizing the line reference and a line clock the frequency of which is a multiple of the line reference; the timing pointer so extracted is converted into a reference value by utilizing the node reference and a node clock; the reference value is utilized to generate a

Abstract: A telecommunication apparatus in which data messages are routed across a switch, each message comprising a message portion and an incoming message identity portion, includes circuitry for generating from the incoming message identity portion an outgoing message identity portion, a switching circuit for utilizing the incoming and outgoing message identity portions to route the message to an output port, circuitry for utilizing the outgoing message identity portion to generate a further message identity portion, and comparator circuitry for comparing the incoming and further message identity portions to detect faults.

Abstract: The telecommunications transmission security arrangement comprises first and second transmission paths, each having first and second serially connected circuit means. The first circuit means of said first path is arranged to be connectable to the second circuit means of said second path. The first circuit means of the second path is arranged to be connectable to the second circuit means of the first path, and the second circuit means of each path are arranged to monitor alarm conditions of the transmission paths and set up a transmission path by way of the first circuit means of the first path and the second circuit means of the second path when the first path is determined not suitable for transmission. A transmission path is set up by way of the first circuit means of the second path and the second circuit means of the first path when the second path is determined not suitable for transmission.

Abstract: In a forty megabit per second TDM signalling system in which twenty 2 megabit per second signalling streams are combined, one of the twenty primary signalling streams is inverted by the circuit arrangement and substituted for one of the other signalling streams. By using adjacent channels the forty megabit signal stream has a guaranteed change of data at least once every twenty bits. The system facilitates clock recovery and synchronization in apparatus employing bi-phase mark encoded data.

Abstract: In order to permit multislot connections to be simply made across a telecommunications digital switch, so that all the slots of the multislot connection experience the same whole frame time delay, the switch is constructed as input and output switch stages each comprising arrays of digital switching modules (DSM) and a central switching area comprising two arrays of Demultiplexing/Mixing/Remultiplexing devices (DMR) interconnected by an array of digital switching modules (DSM), wherein each DMR has a transfer function such that a channel (p) in a time frame of (q) channels on an input line (r) appears on an output line (s) which is related to the input line by means of a backward rotate function, where s=MOD (q-r+p), where MOD=modulo q. This construction of switch ensures that all channels routed through the switch have one of only two possible values of whole frame time delay, thereby simplifying the setting up of a multislot connection.

Abstract: The synchronization arrangement includes a waveform and synchronization information generator to supply synchronization information for transmission with a data stream over digital switching networks. The synchronization information includes two different patterns, phased displaced with respect to each other. Interfaces connect peripheral devices to the networks and are adapted to detect a validate the synchronization information. The checks made are in respect of detecting both patterns, the amount of phase displacement, and the correct sequence. If the synchronization information is invalid, the detecting interface selects a data stream from another network exclusively for use by the corresponding peripheral device.

Abstract: A security arrangement for a telecommunications system having two security planes, a plurality of peripherals, a plurality of peripheral communication controllers; and switching arrangements interconnecting the peripheral communication controllers. To determine a faulty security plane, a duplex path is provided between the controllers, and, using this path, a controller automatically performs path checks on one of the security planes. If the plane is found to be not faulty, the controller sends data associated with that plane to the peripheral with which it is in communication.

Abstract: The Telecommunications system includes at least two exchanges and a plurality of user equipments. Each equipment includes a store for holding a user variable data word particular to that user. Each exchange is provided with a store for holding all the user variable data words of the users connected to it, and each exchange is also provided with its own random variable data word. When a first user makes a secure call to a second user, the first user equipment encrypts the call using its particular variable data word and sends the encrypted data to its own exchange. The exchange decrypts the call using the particular user variable data word that will be used for the call. The exchange encrypts the random variable data word with the particular user variable data word and returns it to the first user. The exchange also sends the random variable data word to the second user's exchange which encrypts it with the user variable data word particular to the second user, and sends it to the second user.

Abstract: An aligner (FIG. 1), which has seven registers SRGA to SRGG each of 64 bits in length, is used to align incoming line signals to exchange data rate and to convert exchange rate data signals into line rate data signals. The aligner behaves as a variable delay and is required to operate in any one of three modes; (i) frame aligning 2,048 k Bits/second line signals to a 2,048 k Bits/second exchange rate, (ii) aligning 1,544 k Bits/second line signal to a 2,048 k Bits/second exchange rate and (iii) converting a 2,048 k Bits/second exchange rate to a 1,544 k Bits/second line rate. In the third mode of operation it is necessary to derive the line clock from the exchange local clock. This is achieved by forming a phase-locked loop (FIG. 5) incorporating the delay of a standard aligner and driving the loop with the exchange frame reset signal (f IN).

Abstract: An aligner is used in a digital telecommunications switching system for correcting the drift between the exchange clocking system and the incoming digital line terminated on the digital line termination units DLT. Typically aligners consists of so-called "elastic-lengthed" buffers having two frames worth of storage arranged such that the line information is written into one "frame area" while the time switch is fed from the other "frame area" and vice versa for each successive frame. Such an arrangement has severe limitations from a fault finding point of view. The aligner of the invention consists of a "single chip" containing a set of five half frame serial shift registers together with read and write address counters and associated logic to ensure that separate "read' and "write" shift registers are maintained.

Abstract: It is an emerging international telecommunications requirement that all 32 channels of the p.c.m. multiplex must be switchable. The switching of channel zero relates to the "spare bits" not defined for synchronization purposes and these bits may be used as a data-bearer for network administration or control purposes. Digital telecommunication switching network, therefore, must be capable of concentrating channel assemblies of these spare bits into one transmit multiplex which may be connected to a spare bit data processor remote from the switching network or co-located with it.