Patents by Inventor Geoffrey E. Carter

Geoffrey E. Carter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6767783
    Abstract: A method of making vertical diodes and transistors in SiC is provided. The method according to the invention uses a mask (e.g., a mask that has been previously used for etching features into the device) for selective epitaxial growth or selective ion implantation. In this manner, the gate and base regions of static induction transistors and bipolar junction transistors can be formed in a self-aligned process. A method of making planar diodes and planar edge termination structures (e.g., guard rings) is also provided.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: July 27, 2004
    Assignee: Mississippi State University-Research and Technology Corporation (RTC)
    Inventors: Jeffrey B. Casady, Geoffrey E. Carter, Yaroslav Koshka, Michael S. Mazzola, Igor Sankin
  • Publication number: 20030034495
    Abstract: A method of making vertical diodes and transistors in SiC is provided. The method according to the invention uses a mask (e.g., a mask that has been previously used for etching features into the device) for selective epitaxial growth or selective ion implantation. In this manner, the gate and base regions of static induction transistors and bipolar junction transistors can be formed in a self-aligned process. A method of making planar diodes and planar edge termination structures (e.g., guard rings) is also provided.
    Type: Application
    Filed: July 12, 2002
    Publication date: February 20, 2003
    Inventors: Jeffrey B. Casady, Geoffrey E. Carter, Yaroslav Koshka, Michael S. Mazzola, Igor Sankin