Abstract: Host page management assist functions are employed to manage storage of a pageable mode virtual environment. These functions enable storage to be managed by a processor of the environment absent intervention of a host of the environment. The functions include a resolve host page function; a pin function; and unpin functions.

Abstract: Host page management assist functions are employed to manage storage of a pageable mode virtual environment. These functions enable storage to be managed by a processor of the environment absent intervention of a host of the environment. The functions include a resolve host page function; a pin function; and unpin functions.

Abstract: Host page management assist functions are employed to manage storage of a pageable mode virtual environment. These functions enable storage to be managed by a processor of the environment absent intervention of a host of the environment. The functions include a resolve host page function; a pin function; and unpin functions.

Abstract: Systems, methods and computer products for compiler support for aggressive safe load speculation. Exemplary embodiments include a method for aggressive safe load speculation for a compiler in a computer system, the method including building a control flow graph, identifying both countable and non-countable loops, gathering a set of candidate loops for load speculation, and for each candidate loop in the set of candidate loops gathered for load speculation, computing an estimate of the iteration count, delay cycles, and code size, performing a profitability analysis and determining an unroll factor based on the delay cycles and the code size, transforming the loop by generating a prologue loop to achieve data alignment and an unrolled main loop with loop directives, indicating which loads can safely be executed speculatively and performing low-level instruction scheduling on the generated unrolled main loop.

Abstract: Systems, methods and computer products for compiler support for aggressive safe load speculation. Exemplary embodiments include a method for aggressive safe load speculation for a compiler in a computer system, the method including building a control flow graph, identifying both countable and non-countable loops, gathering a set of candidate loops for load speculation, for each candidate loop in the set of candidate loops gathered for load speculation performing computing an estimate of the iteration count, delay cycles, and code size, performing a profitability analysis and determine an unroll factor based on the delay cycles and the code size, transforming the loop by generating a prologue loop to achieve data alignment and an unrolled main loop with loop directives, indicating which loads can safely be executed speculatively and performing low-level instruction on the generated unrolled main loop.

Abstract: A method, system, and computer-usable medium for updating references while incrementally compacting a heap. A compaction manager initializes each entry in a compaction data structure with a terminating value, where each entry within the compaction data structure corresponds to an address within a first compaction region. The compaction manager locates a first entry within the compaction data structure corresponding to the address of the first object. The compaction manager stores an address of the second object in the first entry and stores in the second object the value stored in the first entry. The compaction manager calculates a new address for the first object, traverses a chain of references starting with the first entry and updates the chain with the new address until encountering the terminating value, and moves the first object to the new address.

Abstract: A computer storage management system establishes a subpool of available blocks of one size from a multiplicity of different storage frames. The available blocks are queued in the subpool. A garbage collection routine periodically or occasionally determines which of the frames having blocks on the subpool queue are completely available based on the number of available blocks on the queue for each frame. Then, the garbage collection routine removes from the queue and thereby reclaims the blocks of the frames which are completely available. The garbage collection routine also requeues the blocks from the other frames such that the blocks of these other frames are clustered with the other blocks of the same frame. Blocks are allocated from the front of the queue. Blocks of the one size from frames other than those represented at or near the end of the queue are returned to the front of the queue after use.

Abstract: A computer system allocates locations in DASD to store a specified length of data. The allocation attempts to minimize the number of I/O operations and seek time for accessing the DASD. The system records addresses and lengths of sets of contiguous available storage locations in the DASD. Then, the system searches the record to attempt to identify a set of contiguous available storage locations having the specified length and another set of contiguous available storage locations having a length which exceeds the specified length by an amount likely to accomodate most lengths of data subsequently to be stored on the DASD.

Abstract: An apparatus and method are established for recognizing guest virtual machines which require only a subset of interpretive execution facilities. The interpretive execution initialization process recognizes subset candidates and bypasses initialization of those facilities not required by the candidates. The candidates are typically short duration jobs and a reduction of initialization and termination overhead creates a substantial performance improvement. The translation lookaside buffer operation is modified to flag subset guest entries as host entries and to associate a unique segment table origin with each subset guest. This allows the TLB entries to remain between guest machine dispatches eliminating TLB purge time and allowing potential reuse of TLB entries if the same guest is repeatedly dispatched within a short time period. The guest machine state description is modified to flag subset candidates based on address translation and timing requirements.

Abstract: A single non-privileged instruction copies a page of data from a source virtual address in an electronic medium to a destination virtual address in the same or in a different electronic storage medium, and without the intervention of any supervisory program when each medium and the virtual addresses are previously determined. The instruction is not required to specify which medium it will use, does not require its user to know what backing medium it will access, does not require main storage (MS) to be its backing medium, and allows different types of physical addressing to be used by different media. The instruction can lock any page for use in a multi-processor (MP). No physical direction of data movement is provided within the non-privileged machine instruction, which only designates virtual direction of movement. The separation of virtual direction from physical direction is done by avoiding instruction control over selection of electronic media.

Abstract: In a multi-processor system, a program for reducing processor overhead in the dispatch of available work by shifting the burden of responsibility for checking other processors for readiness to accept the work from the Active processor to the otherwise Idle processor. When a processor runs out of work, instead of loading a Wait State PSW it scans queues of available work. During this scan, the scanning processor runs enabled for interrupt so that it can be responsive to I/O and External Interrupts which typically signal incoming work.In the practice of the invention, each processor must have its own storage locations which serve as indicators of available work. In the preferred embodiment they reside in isolated cache-lines that are referenced solely by the owning processor except that another processor may update the indicator when it has prepared a unit of work which may (or must) be performed by the owning processor.