Patents by Inventor Geoffrey Strongin

Geoffrey Strongin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106644
    Abstract: A system and method of enhancing the mitigation of side channel attacks on platform interconnects using endpoint HW based detection, synchronization, and re-keying include generating a set of keys for link encryption based on a high entropy seed, storing the set of keys in a deterministic order in a register, detecting that a re-key programmable threshold is met during link encryption with a device, identifying a synchronization point associated with the device, where the synchronization point indicates the device is ready to switch a current key used for link encryption, and synchronizing a rekeying event with the device.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 28, 2024
    Applicant: Intel Corporation
    Inventors: Aditya Katragada, Geoffrey Strongin, Prakash Iyer, Rajesh Banginwar, Poh Thiam Teoh, Gary Wallichs
  • Publication number: 20240012972
    Abstract: An integrated circuit includes a region of configurable logic circuits and a configuration controller circuit that generates a first health condition report indicating a first health condition of the region before configuring the configurable logic circuits according to a circuit design. The configuration controller circuit generates a second health condition report indicating a second health condition of the region after configuring the configurable logic circuits according to the circuit design.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 11, 2024
    Applicant: Intel Corporation
    Inventors: Michael Neve De Mevergnies, Geoffrey Strongin
  • Patent number: 11520611
    Abstract: A host Virtual Machine Monitor (VMM) operates “blindly,” without the host VMM having the ability to access data within a guest virtual machine (VM) or the ability to access directly control structures that control execution flow of the guest VM. Guest VMs execute within a protected region of memory (called a key domain) that even the host VMM cannot access. Virtualization data structures that pertain to the execution state (e.g., a Virtual Machine Control Structure (VMCS)) and memory mappings (e.g., Extended Page Tables (EPTs)) of the guest VM are also located in the protected memory region and are also encrypted with the key domain key. The host VMM and other guest VMs, which do not possess the key domain key for other key domains, cannot directly modify these control structures nor access the protected memory region. The host VMM, however, using VMPageIn and VMPageOut instructions, can build virtual machines in key domains and page VM pages in and out of key domains.
    Type: Grant
    Filed: March 30, 2019
    Date of Patent: December 6, 2022
    Assignee: Intel Corporation
    Inventors: David Durham, Siddhartha Chhabra, Geoffrey Strongin, Ronald Perez
  • Publication number: 20220150046
    Abstract: A security processor includes a scheduler to read input data blocks from an input buffer, send the input data blocks to one or more cryptographic circuits in a first random order; and send data blocks having random values in a second random order to one or more of the cryptographic circuits that did not receive the input data blocks.
    Type: Application
    Filed: September 16, 2021
    Publication date: May 12, 2022
    Applicant: Intel Corporation
    Inventors: Dumitru-Daniel Dinu, Emre Karabulut, Aditya Katragada, Geoffrey Strongin, Avinash L. Varna
  • Patent number: 10768968
    Abstract: A method includes receiving, by a processor from a virtual machine (VM) executed by the processor, an indication that a proper subset of a plurality of virtual memory pages of the VM are secure memory pages. The method further includes, responsive to determining the VM is attempting to access a first memory page, determining whether the proper subset comprises the first memory page. The method further includes, responsive to determining the proper subset comprises the first memory page: using first attributes specified by the VM for the first memory page; and ignoring second attributes specified by a virtual machine monitor (VMM) for the first memory page. The VMM is executed by the processor to manage the VM.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: September 8, 2020
    Assignee: Intel Corporation
    Inventors: Gilbert Neiger, Geoffrey Strongin, Ramya Jayaram Masti
  • Publication number: 20200057664
    Abstract: A host Virtual Machine Monitor (VMM) operates “blindly,” without the host VMM having the ability to access data within a guest virtual machine (VM) or the ability to access directly control structures that control execution flow of the guest VM. Guest VMs execute within a protected region of memory (called a key domain) that even the host VMM cannot access. Virtualization data structures that pertain to the execution state (e.g., a Virtual Machine Control Structure (VMCS)) and memory mappings (e.g., Extended Page Tables (EPTs)) of the guest VM are also located in the protected memory region and are also encrypted with the key domain key. The host VMM and other guest VMs, which do not possess the key domain key for other key domains, cannot directly modify these control structures nor access the protected memory region. The host VMM, however, using VMPageIn and VMPageOut instructions, can build virtual machines in key domains and page VM pages in and out of key domains.
    Type: Application
    Filed: March 30, 2019
    Publication date: February 20, 2020
    Applicant: Intel Corporation
    Inventors: David Durham, Siddhartha Chhabra, Geoffrey Strongin, Ronald Perez
  • Publication number: 20190042299
    Abstract: A method includes receiving, by a processor from a virtual machine (VM) executed by the processor, an indication that a proper subset of a plurality of virtual memory pages of the VM are secure memory pages. The method further includes, responsive to determining the VM is attempting to access a first memory page, determining whether the proper subset comprises the first memory page. The method further includes, responsive to determining the proper subset comprises the first memory page: using first attributes specified by the VM for the first memory page; and ignoring second attributes specified by a virtual machine monitor (VMM) for the first memory page. The VMM is executed by the processor to manage the VM.
    Type: Application
    Filed: September 28, 2018
    Publication date: February 7, 2019
    Inventors: Gilbert NEIGER, Geoffrey STRONGIN, Ramya JAYARAM MASTI
  • Patent number: 10104122
    Abstract: Sensor data may be filtered in a secure environment. The filtering may limit distribution of the sensor data. Filtering may modify the sensor data, for example, to prevent identification of a person depicted in a captured image or to prevent acquiring a user's precise location. Filtering may also add or require other data use controls to access the data. Attestation that a filter policy is being applied and working properly or not may be provided as well.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Scott H. Robinson, Jason Martin, Howard C. Herbert, Michael LeMay, Karanvir Ken S. Grewal, Keith L. Shippy, Geoffrey Strongin
  • Patent number: 9569637
    Abstract: Methods, apparatuses and storage medium associated with providing enhanced privacy during usage of computer vision are disclosed. In embodiments, an apparatus may include one or more privacy indicators to indicate one or more privacy conditions of the apparatus in association with provision of computer vision on the apparatus. The apparatus may further include a privacy engine coupled with the one or more privacy indicators, and configured to pre-process images from an image source of the apparatus associated with the provision of computer vision to the apparatus, to increase privacy for a user of the apparatus, and to control the one or more privacy indicators. In embodiments, the apparatus may include means for blanking out one or more pixels with depth values identified as greater than a threshold. Other embodiments may be described and claimed.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: February 14, 2017
    Assignee: Intel Corporation
    Inventors: David Bar-On, Geoffrey Strongin
  • Publication number: 20160078249
    Abstract: Methods, apparatuses and storage medium associated with providing enhanced privacy during usage of computer vision are disclosed. In embodiments, an apparatus may include one or more privacy indicators to indicate one or more privacy conditions of the apparatus in association with provision of computer vision on the apparatus. The apparatus may further include a privacy engine coupled with the one or more privacy indicators, and configured to pre-process images from an image source of the apparatus associated with the provision of computer vision to the apparatus, to increase privacy for a user of the apparatus, and to control the one or more privacy indicators. In embodiments, the apparatus may include means for blanking out one or more pixels with depth values identified as greater than a threshold. Other embodiments may be described and claimed.
    Type: Application
    Filed: November 11, 2015
    Publication date: March 17, 2016
    Inventors: David Bar-On, Geoffrey Strongin
  • Patent number: 9213863
    Abstract: Methods, apparatuses and storage medium associated with providing enhanced privacy during usage of computer vision are disclosed. In embodiments, an apparatus may include one or more privacy indicators to indicate one or more privacy conditions of the apparatus in association with provision of computer vision on the apparatus. The apparatus may further include a privacy engine coupled with the one or more privacy indicators, and configured to pre-process images from an image source of the apparatus associated with the provision of computer vision to the apparatus, to increase privacy for a user of the apparatus, and to control the one or more privacy indicators. In embodiments, the apparatus may include means for blanking out one or more pixels with depth values identified as greater than a threshold. Other embodiments may be described and claimed.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: December 15, 2015
    Assignee: Intel Corporation
    Inventors: David Bar-On, Geoffrey Strongin
  • Publication number: 20150350255
    Abstract: Sensor data may be filtered in a secure environment. The filtering may limit distribution of the sensor data. Filtering may modify the sensor data, for example, to prevent identification of a person depicted in a captured image or to prevent acquiring a user's precise location. Filtering may also add or require other data use controls to access the data. Attestation that a filter policy is being applied and working properly or not may be provided as well.
    Type: Application
    Filed: August 13, 2015
    Publication date: December 3, 2015
    Inventors: Scott H. Robinson, Jason Martin, Howard C. Herbert, Michael LeMay, Karanvir Ken S. Grewal, Keith L. Shippy, Geoffrey Strongin
  • Patent number: 9124635
    Abstract: Sensor data may be filtered in a secure environment. The filtering may limit distribution of the sensor data. Filtering may modify the sensor data, for example, to prevent identification of a person depicted in a captured image or to prevent acquiring a user's precise location. Filtering may also add or require other data use controls to access the data. Attestation that a filter policy is being applied and working properly or not may be provided as well.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: September 1, 2015
    Assignee: Intel Corporation
    Inventors: Scott H. Robinson, Jason Martin, Howard C. Herbert, Michael LeMay, Karanvir Ken S. Grewal, Keith L. Shippy, Geoffrey Strongin
  • Publication number: 20150040242
    Abstract: Methods, apparatuses and storage medium associated with providing enhanced privacy during usage of computer vision are disclosed. In embodiments, an apparatus may include one or more privacy indicators to indicate one or more privacy conditions of the apparatus in association with provision of computer vision on the apparatus. The apparatus may further include a privacy engine coupled with the one or more privacy indicators, and configured to pre-process images from an image source of the apparatus associated with the provision of computer vision to the apparatus, to increase privacy for a user of the apparatus, and to control the one or more privacy indicators. In embodiments, the apparatus may include means for blanking out one or more pixels with depth values identified as greater than a threshold. Other embodiments may be described and claimed.
    Type: Application
    Filed: October 20, 2014
    Publication date: February 5, 2015
    Inventors: David Bar-On, Geoffrey Strongin
  • Patent number: 8914894
    Abstract: Methods, apparatuses and storage medium associated with providing enhanced privacy during usage of computer vision are disclosed. In embodiments, an apparatus may include one or more privacy indicators to indicate one or more privacy conditions of the apparatus in association with provision of computer vision on the apparatus. The apparatus may further include a privacy engine coupled with the one or more privacy indicators, and configured to pre-process images from an image source of the apparatus associated with the provision of computer vision to the apparatus, to increase privacy for a user of the apparatus, and to control the one or more privacy indicators. In embodiments, the apparatus may include means for blanking out one or more pixels with depth values identified as greater than a threshold. Other embodiments may be described and claimed.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: December 16, 2014
    Assignee: Intel Corporation
    Inventors: David Bar-On, Geoffrey Strongin
  • Publication number: 20140157349
    Abstract: Sensor data may be filtered in a secure environment. The filtering may limit distribution of the sensor data. Filtering may modify the sensor data, for example, to prevent identification of a person depicted in a captured image or to prevent acquiring a user's precise location. Filtering may also add or require other data use controls to access the data. Attestation that a filter policy is being applied and working properly or not may be provided as well.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Inventors: Scott H. Robinson, Jason Martin, Howard C. Herbert, Michael LeMay, Karanvir Ken S. Grewal, Keith L. Shippy, Geoffrey Strongin
  • Publication number: 20140090074
    Abstract: Methods, apparatuses and storage medium associated with providing enhanced privacy during usage of computer vision are disclosed. In embodiments, an apparatus may include one or more privacy indicators to indicate one or more privacy conditions of the apparatus in association with provision of computer vision on the apparatus. The apparatus may further include a privacy engine coupled with the one or more privacy indicators, and configured to pre-process images from an image source of the apparatus associated with the provision of computer vision to the apparatus, to increase privacy for a user of the apparatus, and to control the one or more privacy indicators. In embodiments, the apparatus may include means for blanking out one or more pixels with depth values identified as greater than a threshold. Other embodiments may be described and claimed.
    Type: Application
    Filed: September 21, 2012
    Publication date: March 27, 2014
    Applicant: Intel Corporation
    Inventors: David Bar-On, Geoffrey Strongin
  • Patent number: 8612729
    Abstract: In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: December 17, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Garth D. Hillman, Geoffrey Strongin, Andrew R. Rawson, Gary H. Simpson, Ralf Findeisen
  • Patent number: 8327137
    Abstract: A virtualized computer system includes at least one guest environment (guest), a service guest environment (SG) and trusted software. The at least one guest includes at least one driver having a first private message interface. The SG includes a first USB host controller (HC) driver, which is in communication with a USB HC. The first USB HC driver includes a second private message interface. The trusted software is in communication with the guest and the SG. The trusted software includes a data intercept/routing mechanism that facilitates secure communication between at least one USB device coupled to the USB HC and the guest using the first and second private message interfaces.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: December 4, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Paul Erb, Geoffrey Strongin
  • Patent number: 7831813
    Abstract: In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: November 9, 2010
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Garth D. Hillman, Geoffrey Strongin, Andrew R. Rawson, Gary H. Simpson, Ralf Findeisen