Patents by Inventor Geon Ho Shin

Geon Ho Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170294346
    Abstract: Disclosed is a method for reducing contact resistance, including depositing a GST layer on an InGaAs substrate, generating an InGaAs/GST/Ni stacked structure by depositing a Ni layer on the GST layer, and thermally treating the stacked structure to rearrange components of the GST layer and to generate a Ni-InGaAs alloy.
    Type: Application
    Filed: February 13, 2017
    Publication date: October 12, 2017
    Inventors: Hi Deok LEE, Meng LI, Geon Ho SHIN, Jeongchan LEE
  • Patent number: 9786555
    Abstract: Disclosed is a method for reducing contact resistance, including depositing a GST layer on an InGaAs substrate, generating an InGaAs/GST/Ni stacked structure by depositing a Ni layer on the GST layer, and thermally treating the stacked structure to rearrange components of the GST layer and to generate a Ni—InGaAs alloy.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: October 10, 2017
    Assignee: THE INDUSTRY & ACADEMIC COOPERATION IN CHUNGNAM NATIONAL UNIVERSITY (IAC)
    Inventors: Hi Deok Lee, Meng Li, Geon Ho Shin, Jeongchan Lee