Patents by Inventor Georg Brenninger

Georg Brenninger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10240235
    Abstract: An apparatus for depositing a material layer originating from process gas on a substrate wafer, contains: a reactor chamber delimited by an upper dome, a lower dome, and a side wall; a susceptor for holding the substrate wafer during the deposition of the material layer; a preheating ring surrounding the susceptor; a liner, on which the preheating ring is supported in a centered position wherein a gap having a uniform width is present between the preheating ring and the susceptor; and a spacer acting between the liner and the preheating ring, the spacer keeping the preheating ring in the centered position and providing a distance ? between the preheating ring and the liner.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: March 26, 2019
    Assignee: SILTRONIC AG
    Inventors: Georg Brenninger, Alois Aigner, Christian Hager
  • Publication number: 20180194633
    Abstract: Granular silicon which is especially useful in reducing dislocations and gas inclusions of single crystals prepared therefrom is produced by a heat treatment in which a process gas flowing through a plasma chamber heats granular silicon, and the heated granular silicon is transported counter-currently through the plasma chamber, melting an outer periphery of the granular silicon, which then recrystallizes, producing an exterior with a lower concentration of crystal grains than the interior of the granules.
    Type: Application
    Filed: July 1, 2016
    Publication date: July 12, 2018
    Applicant: SILTRONIC AG
    Inventor: Georg BRENNINGER
  • Patent number: 9828692
    Abstract: An apparatus for producing a single crystal of silicon comprises a plate with a top side, an outer edge, and an inner edge, a central opening adjoining the inner edge, and a tube extending from the central opening to beneath the bottom side of the plate; a device for metering granular silicon onto the plate; a first induction heating coil above the plate, provided for melting of the granular silicon deposited; a second induction heating coil positioned beneath the plate, provided for stabilization of a melt of silicon, the melt being present upon a growing single crystal of silicon. The top side of the plate consists of ceramic material and has elevations, the distance between the elevations in a radial direction being not less than 2 mm and not more than 15 mm.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: November 28, 2017
    Assignee: SILTRONIC AG
    Inventors: Georg Brenninger, Waldemar Stein, Maik Haeberlen
  • Patent number: 9828693
    Abstract: A crystal of semiconductor material is produced in an apparatus having a crucible with a crucible bottom and a crucible wall, the crucible bottom having a top surface, an underside, and a multitude of openings disposed between the crucible wall and a center of the crucible bottom, and elevations disposed on the top surface and the underside of the crucible bottom; and an induction heating coil disposed below the crucible for melting semiconductor material and stabilizing a melt of semiconductor material covering a growing crystal of semiconductor material. The growth process comprises generating a bed of a semiconductor material feed on the top surface of the crucible bottom and melting semiconductor material on the bed using the induction heating coil.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: November 28, 2017
    Assignee: SILTRONIC AG
    Inventors: Georg Brenninger, Georg Raming
  • Patent number: 9410262
    Abstract: A silicon single crystal is produced by a method wherein a silicon plate is inductively heated; granular silicon is melted on the silicon plate; and the molten silicon thus produced flows through a flow conduit in the center of the plate to a phase boundary at which a silicon single crystal crystallizes, wherein a silicon ring having a lower resistivity than the plate, and lying on the plate, is inductively heated prior to inductively heating the plate, and melting the ring.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: August 9, 2016
    Assignee: SILTRONIC AG
    Inventors: Josef Lobmeyer, Georg Brenninger, Waldemar Stein
  • Publication number: 20150354087
    Abstract: A crystal of semiconductor material is produced in an apparatus having a crucible with a crucible bottom and a crucible wall, the crucible bottom having a top surface, an underside, and a multitude of openings disposed between the crucible wall and a center of the crucible bottom, and elevations disposed on the top surface and the underside of the crucible bottom; and an induction heating coil disposed below the crucible for melting semiconductor material and stabilizing a melt of semiconductor material covering a growing crystal of semiconductor material. The growth process comprises generating a bed of a semiconductor material feed on the top surface of the crucible bottom and melting semiconductor material on the bed using the induction heating coil.
    Type: Application
    Filed: May 14, 2015
    Publication date: December 10, 2015
    Inventors: Georg BRENNINGER, Georg RAMING
  • Publication number: 20150292109
    Abstract: An apparatus for producing a single crystal of silicon comprises a plate with a top side, an outer edge, and an inner edge, a central opening adjoining the inner edge, and a tube extending from the central opening to beneath the bottom side of the plate; a device for metering granular silicon onto the plate; a first induction heating coil above the plate, provided for melting of the granular silicon deposited; a second induction heating coil positioned beneath the plate, provided for stabilization of a melt of silicon, the melt being present upon a growing single crystal of silicon. The top side of the plate consists of ceramic material and has elevations, the distance between the elevations in a radial direction being not less than 2 mm and not more than 15 mm.
    Type: Application
    Filed: March 27, 2015
    Publication date: October 15, 2015
    Inventors: Georg BRENNINGER, Waldemar STEIN, Maik HAEBERLEN
  • Patent number: 9153472
    Abstract: Uniformity of vapor deposited coatings on semiconductor wafers is improved by employing an apparatus having a gas distributor head below a susceptor onto which the wafer is placed, the gas distributor head directing a fan of cooling gas at the rear side of the susceptor. The ratio of the diameter of the cooled section of the susceptor to the diameter D of the wafer is preferably from 0.1 to 0.4.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: October 6, 2015
    Assignee: Siltronic AG
    Inventor: Georg Brenninger
  • Patent number: 9018021
    Abstract: A layer is deposited onto a semiconductor wafer by CVD in a process chamber having upper and lower covers, wherein the wafer front side temperature is measured; the wafer is heated to deposition temperature; the temperature of the upper process chamber cover is controlled to a target temperature by measuring the temperature of the center of the outer surface of the upper cover as the value of a controlled variable of an upper cover temperature control loop; a gas flow rate of process gas for depositing the layer is set; and a layer is deposited on the heated wafer front side during control of the upper cover temperature to the target temperature. A process chamber suitable therefor has a sensor for measuring the upper cover outer surface center temperature and a controller for controlling this temperature to a predetermined value.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: April 28, 2015
    Assignee: Siltronic AG
    Inventor: Georg Brenninger
  • Publication number: 20150056787
    Abstract: Uniformity of vapor deposited coatings on semiconductor wafers is improved by employing an apparatus having a gas distributor head below a susceptor onto which the wafer is placed, the gas distributor head directing a fan of cooling gas at the rear side of the susceptor. The ratio of the diameter of the cooled section of the susceptor to the diameter D of the wafer is preferably from 0.1 to 0.4.
    Type: Application
    Filed: March 22, 2013
    Publication date: February 26, 2015
    Inventor: Georg Brenninger
  • Publication number: 20140060421
    Abstract: A silicon single crystal is produced by a method wherein a silicon plate is inductively heated; granular silicon is melted on the silicon plate; and the molten silicon thus produced flows through a flow conduit in the center of the plate to a phase boundary at which a silicon single crystal crystallizes, wherein a silicon ring having a lower resistivity than the plate, and lying on the plate, is inductively heated prior to inductively heating the plate, and melting the ring.
    Type: Application
    Filed: August 19, 2013
    Publication date: March 6, 2014
    Applicant: Siltronic AG
    Inventors: Josef Lobmeyer, Georg Brenninger, Waldemar Stein
  • Publication number: 20130078743
    Abstract: A layer is deposited onto a semiconductor wafer by CVD in a process chamber having upper and lower covers, wherein the wafer front side temperature is measured; the wafer is heated to deposition temperature; the temperature of the upper process chamber cover is controlled to a target temperature by measuring the temperature of the center of the outer surface of the upper cover as the value of a controlled variable of an upper cover temperature control loop; a gas flow rate of process gas for depositing the layer is set; and a layer is deposited on the heated wafer front side during control of the upper cover temperature to the target temperature. A process chamber suitable therefor has a sensor for measuring the upper cover outer surface center temperature and a controller for controlling this temperature to a predetermined value.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 28, 2013
    Applicant: SILTRONIC AG
    Inventor: Georg Brenninger
  • Patent number: 8357549
    Abstract: An incorrect position of a semiconductor wafer during thermal treatment in a process chamber heated by means of infrared emitters and transmissive to infrared radiation is identified, wherein the semiconductor wafer lies in a circular pocket of a rotating susceptor and is held at a predetermined temperature with the aid of the infrared emitters and a control system, and wherein thermal radiation is measured by a pyrometer, an amplitude of the fluctuations of the measurement signal is determined and an incorrect position of the semiconductor wafer is assumed if the amplitude exceeds a predetermined maximum value. The pyrometer is oriented such that the measurement spot detected by the pyrometer lies partly on the semiconductor wafer and partly outside the semiconductor wafer on the susceptor so that it is possible to identify an eccentric position of the semiconductor wafer within the pocket of the susceptor.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: January 22, 2013
    Assignee: Siltronic AG
    Inventors: Georg Brenninger, Konrad Gruendl
  • Publication number: 20120263875
    Abstract: An apparatus for depositing a material layer originating from process gas on a substrate wafer, contains: a reactor chamber delimited by an upper dome, a lower dome, and a side wall; a susceptor for holding the substrate wafer during the deposition of the material layer; a preheating ring surrounding the susceptor; a liner, on which the preheating ring is supported in a centered position wherein a gap having a uniform width is present between the preheating ring and the susceptor; and a spacer acting between the liner and the preheating ring, the spacer keeping the preheating ring in the centered position and providing a distance ? between the preheating ring and the liner.
    Type: Application
    Filed: February 29, 2012
    Publication date: October 18, 2012
    Applicant: SILTRONIC AG
    Inventors: Georg Brenninger, Alois Aigner, Christian Hager
  • Patent number: 8283262
    Abstract: A method for depositing a layer on a semiconductor wafer using chemical vapor deposition (CVD). The method includes providing a chamber having an inlet opening and an outlet opening and a channel joining the inlet opening and the outlet opening, wherein the channel is bounded at the bottom by a plane and at the top by a window transmissive to thermal radiation. A semiconductor wafer is disposed so that a surface of the semiconductor lies in the plane, wherein the window has a center region disposed over the semiconductor wafer and an edge region surrounding the center region and not disposed over the semiconductor wafer. A distance between the plane and the window varies across the chamber, the distance being greater at the edge region than at the center region. A tangent applied to a radial profile of the distance at a boundary between the center region and the edge region forms an angle with the plane of not less than 15° and not more than 25°.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: October 9, 2012
    Assignee: Siltronic AG
    Inventors: Georg Brenninger, Alois Aigner
  • Patent number: 8268708
    Abstract: Silicon wafers polished on their front sides are individually placed on a susceptor in an epitaxy reactor and firstly pretreated under a hydrogen atmosphere, and secondly with addition of an etching medium with a flow rate of 1.5-5 slm to the hydrogen atmosphere, the hydrogen flow rate being 1-100 slm in both steps, and subsequently epitaxially coated on the polished front side, and then removed from the reactor. In a second method, gas flows introduced into the reactor by injectors are distributed into outer and inner zones of the chamber, such that the inner zone gas flow acts on a wafer central region and the outer zone gas flow acts on a wafer edge region, the inner/outer distribution of the etching medium I/O=0-0.75. Silicon wafers having an epitaxial layer having global flatness value GBIR of 0.02-0.06 ?m, relative to an edge exclusion of 2 mm are produced.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: September 18, 2012
    Assignee: Siltronic AG
    Inventors: Joerg Haberecht, Christian Hager, Georg Brenninger
  • Publication number: 20100216261
    Abstract: An incorrect position of a semiconductor wafer during thermal treatment in a process chamber heated by means of infrared emitters and transmissive to infrared radiation is identified, wherein the semiconductor wafer lies in a circular pocket of a rotating susceptor and is held at a predetermined temperature with the aid of the infrared emitters and a control system, and wherein thermal radiation is measured by a pyrometer, an amplitude of the fluctuations of the measurement signal is determined and an incorrect position of the semiconductor wafer is assumed if the amplitude exceeds a predetermined maximum value. The pyrometer is oriented such that the measurement spot detected by the pyrometer lies partly on the semiconductor wafer and partly outside the semiconductor wafer on the susceptor so that it is possible to identify an eccentric position of the semiconductor wafer within the pocket of the susceptor.
    Type: Application
    Filed: January 25, 2010
    Publication date: August 26, 2010
    Applicant: SILTRONIC AG
    Inventors: Georg Brenninger, Konrad Gruendl
  • Publication number: 20100176491
    Abstract: Silicon wafers polished on their front sides are individually placed on a susceptor in an epitaxy reactor and firstly pretreated under a hydrogen atmosphere, and secondly with addition of an etching medium with a flow rate of 1.5-5 slm to the hydrogen atmosphere, the hydrogen flow rate being 1-100 slm in both steps, and subsequently epitaxially coated on the polished front side, and then removed from the reactor. In a second method, gas flows introduced into the reactor by injectors are distributed into outer and inner zones of the chamber, such that the inner zone gas flow acts on a wafer central region and the outer zone gas flow acts on a wafer edge region, the inner/outer distribution of the etching medium I/O=0-0.75. Silicon wafers having an epitaxial layer having global flatness value GBIR of 0.02-0.06 ?m, relative to an edge exclusion of 2 mm are produced.
    Type: Application
    Filed: January 5, 2010
    Publication date: July 15, 2010
    Applicant: SILTRONIC AG
    Inventors: Joerg Haberecht, Christian Hager, Georg Brenninger
  • Publication number: 20100015402
    Abstract: A method for depositing a layer on a semiconductor wafer using chemical vapor deposition (CVD). The method includes providing a chamber having an inlet opening and an outlet opening and a channel joining the inlet opening and the outlet opening, wherein the channel is bounded at the bottom by a plane and at the top by a window transmissive to thermal radiation. A semiconductor wafer is disposed so that a surface of the semiconductor lies in the plane, wherein the window has a center region disposed over the semiconductor wafer and an edge region surrounding the center region and not disposed over the semiconductor wafer. A distance between the plane and the window varies across the chamber, the distance being greater at the edge region than at the center region. A tangent applied to a radial profile of the distance at a boundary between the center region and the edge region forms an angle with the plane of not less than 15° and not more than 25°.
    Type: Application
    Filed: July 9, 2009
    Publication date: January 21, 2010
    Applicant: Siltronic AG
    Inventors: Georg Brenninger, Alois Aigner
  • Patent number: 6869481
    Abstract: A method and a device for regulating a pressure in an epitaxy reactor, wherein the epitaxy reactor has a wafer handling chamber WHC, a process chamber PC, and a gate valve GV connecting the two chambers. The wafer handling chamber is continuously purged with inert gas. The pressure difference between the wafer handling chamber and the process chamber is measured, and the resulting measurement signal is used in a control circuit to regulate the pressure in the wafer handling chamber. In this case the pressure in the wafer handling chamber is reduced if the pressure difference is above a predetermined value and the pressure in the wafer handling chamber is increased if the pressure difference is below a predetermined value. The predetermined pressure difference is defined as a pressure being between 5 and 500 PA. The WHC and the PC each have a gas discharge line and a gas input line.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: March 22, 2005
    Assignee: Siltronic AG
    Inventors: Anton Schatzeder, Georg Brenninger