Patents by Inventor Georg Bruederl

Georg Bruederl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for the production of semi-conductor chips
    Patent number: 7329587
    Abstract: A method for producing a plurality of semiconductor chips, particularly radiation-emitting semiconductor chips, each having at least one epitaxially produced functional semiconductor layer stack, comprising the following method steps: preparing a growth substrate wafer (1) substantially comprised of semiconductor material from a semiconductor material system that is with respect to lattice parameters the same as or similar to that on which a semiconductor layer sequence for the functional semiconductor layer stack is based, forming in the growth substrate wafer (1) a separation zone (4) disposed parallel to a main face (100) of the growth substrate wafer (1), joining the growth substrate wafer (1) to an auxiliary carrier wafer (2), detaching along the separation zone (4) a portion (11) of the growth substrate wafer (1) that faces away from the auxiliary carrier wafer (2) as viewed from the separation zone (4), forming on the portion (12) of the growth substrate wafer remaining on the auxiliary carrier wafe
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: February 12, 2008
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Georg Bruederl, Berthold Hahn, Volker Haerle
  • Method for the production of semi-conductor chips
    Publication number: 20060211159
    Abstract: A method for producing a plurality of semiconductor chips, particularly radiation-emitting semiconductor chips, each having at least one epitaxially produced functional semiconductor layer stack, comprising the following method steps: preparing a growth substrate wafer (1) substantially comprised of semiconductor material from a semiconductor material system that is with respect to lattice parameters the same as or similar to that on which a semiconductor layer sequence for the functional semiconductor layer stack is based, forming in the growth substrate wafer (1) a separation zone (4) disposed parallel to a main face (100) of the growth substrate wafer (1), joining the growth substrate wafer (1) to an auxiliary carrier wafer (2), detaching along the separation zone (4) a portion (11) of the growth substrate wafer (1) that faces away from the auxiliary carrier wafer (2) as viewed from the separation zone (4), forming on the portion (12) of the growth substrate wafer remaining on the auxiliary carrier
    Type: Application
    Filed: June 24, 2005
    Publication date: September 21, 2006
    Inventors: Georg Bruederl, Berthold Hahn, Volker Haerle