Patents by Inventor Georg Pfusterschmied

Georg Pfusterschmied has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240258105
    Abstract: The present invention provides a compound semiconductor layered structure comprising: a semiconductor substrate having a bottom surface and a top surface; and a compound semiconductor film on top of said semiconductor substrate, said compound semiconductor film comprising a porous, polycrystalline bottom layer in direct contact with said top surface of said semiconductor substrate, and methods of making the same.
    Type: Application
    Filed: May 20, 2022
    Publication date: August 1, 2024
    Inventors: Markus LEITGEB, Ben DEPUYDT, Georg PFUSTERSCHMIED, Ulrich SCHMID
  • Publication number: 20240128080
    Abstract: The present invention provides compound semiconductor layered structures comprising a semiconductor substrate having a bottom layer and a top layer; and a semiconductor film on top of said semiconductor substrate, said semiconductor film comprising a bottom layer, a core and a top layer, whereby said bottom layer of said semiconductor film is in contact with said top surface of said semiconductor substrate, and wherein said top layer is nonporous. Preferred compound semiconductors further comprise a semiconductor overlayer having a bottom surface layer and a top surface layer, whereby said bottom surface layer of said second semiconductor layer is in contact with said top layer of said semiconductor film. The present invention also provides process for preparing the same.
    Type: Application
    Filed: February 28, 2022
    Publication date: April 18, 2024
    Inventors: Markus LEITGEB, Ben DEPUYDT, Georg PFUSTERSCHMIED, Ulrich SCHMID
  • Patent number: 11677023
    Abstract: A semiconductor device and a method of manufacturing a semiconductor are provided. In an embodiment, a first trench is formed in a silicon carbide layer. A second trench is formed in the silicon carbide layer to define a mesa in the silicon carbide layer between the first trench and the second trench. A first doped semiconductor material is formed in the first trench and a second doped semiconductor material is formed in the second trench. A third doped semiconductor material is formed over the mesa to define a heterojunction at an interface between the third doped semiconductor material and the mesa.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: June 13, 2023
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Jens Peter Konrath, Georg Pfusterschmied, Gregor Pobegen, Ulrich Schmid, Fabian Triendl
  • Publication number: 20220359748
    Abstract: A semiconductor device and a method of manufacturing a semiconductor are provided. In an embodiment, a first trench is formed in a silicon carbide layer. A second trench is formed in the silicon carbide layer to define a mesa in the silicon carbide layer between the first trench and the second trench. A first doped semiconductor material is formed in the first trench and a second doped semiconductor material is formed in the second trench. A third doped semiconductor material is formed over the mesa to define a heterojunction at an interface between the third doped semiconductor material and the mesa.
    Type: Application
    Filed: May 4, 2021
    Publication date: November 10, 2022
    Inventors: Jens Peter KONRATH, Georg Pfusterschmied, Gregor Pobegen, Ulrich Schmid, Fabian Triendl