Patents by Inventor Georg Pietsch
Georg Pietsch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8801500Abstract: A method for the simultaneous material-removing processing of both sides of at least three semiconductor wafers includes providing a double-side processing apparatus including two rotating ring-shaped working disks and a rolling apparatus. The carriers are arranged in the double-side processing apparatus and the openings are disposed in the carriers so as to satisfy the inequality: R/e·sin(?/N*)?r/e?1?1.2 where N* denotes a ratio of the round angle and an angle at which adjacent carriers are inserted into the rolling apparatus with the greatest distance with respect to one another, r denotes a radius of each opening for receiving a respective semiconductor wafer, e denotes a radius of a pitch circle around a midpoint of the carrier on which the opening is arranged, and R denotes a radius of the pitch circle on which the carriers move between the working disks by means of the rolling apparatus.Type: GrantFiled: December 7, 2011Date of Patent: August 12, 2014Assignee: Siltronic AGInventor: Georg Pietsch
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Patent number: 8795776Abstract: A method provides a respective flat working layer on each of two working disks of a double-side processing apparatus including a ring-shaped upper working disk, a ring shaped lower working disk and a rolling apparatus that are rotatably mounted about an axis of symmetry of the double-side processing apparatus. The method includes applying a lower intermediate layer and upper intermediate layer on respective surfaces of the lower and upper working disks. Then, simultaneous leveling of both intermediate layers is performed by moving trimming apparatuses on cycloidal paths over the intermediate layers using the rolling apparatus and the respective outer toothing under pressure and with addition of a cooling lubricant, so as to provide a material removal from the intermediate layers. A lower working layer of uniform thickness is then applied to the lower intermediate layer and an upper working layer of uniform thickness is applied to the upper intermediate layer.Type: GrantFiled: January 13, 2012Date of Patent: August 5, 2014Assignee: Siltronic AGInventor: Georg Pietsch
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Publication number: 20140170942Abstract: A trimming apparatus for trimming two working layers including bonded abrasive applied on mutually facing sides of an upper and a lower working disk of a grinding apparatus configured for simultaneous double-side processing of flat workpiece includes a trimming disk, a plurality of trimming bodies and an outer toothing, where the trimming bodies are configured to release abrasive substances upon contract with the working layers so as to effect material removal from the working layers. At least 80% of the area of the trimming bodies configured to come into contact with the working layers is arranged within a ring-shaped region on the trimming disk. The width of the ring-shaped region is between 1-25% of the diameters of the trimming disk and the area of the trimming bodies which comes into contact with the working layers occupies 20-90% of the total area of the ring-shaped region.Type: ApplicationFiled: February 25, 2014Publication date: June 19, 2014Applicant: Siltronic AGInventors: Georg Pietsch, Michael Kerstan
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Publication number: 20140170939Abstract: A method for trimming two working layers including bonded abrasive applied on mutually facing sides of an upper and a lower working disk of a grinding apparatus configured for simultaneous double-side processing of flat workpiece includes providing at least one trimming apparatus including a trimming disk, a plurality of trimming bodies and an outer toothing. The upper and lower working disks are rotated. The trimming apparatus is moved between the rotating working disks using a rolling apparatus and the outer toothing on cycloidal paths relative to working layers of the working disks. The working layers and the trimming body are brought into contact so as to release abrasive substances from the trimming bodies and so as to effect material removal from the working layers. The direction of the drives of the grinding apparatus is changed at least twice during trimming.Type: ApplicationFiled: February 20, 2014Publication date: June 19, 2014Applicant: Siltronic AGInventors: Georg Pietsch, Michael Kerstan
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Patent number: 8685270Abstract: A method for producing a semiconductor wafer sliced from a single crystal includes rounding an edge using a grinding disk containing abrasives with an average grain size of 20.0-60.0 ?m. A first simultaneous double-side material-removing process is performed wherein the semiconductor wafers are processed between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 5.0-20.0 ?m, wherein the semiconductor wafer is placed in a cutout in one of a plurality of carriers rotatable by a rolling apparatus such that the semiconductor wafer lies in a freely movable manner in the carrier and the wafer is movable on a cycloidal trajectory. A second simultaneous double-side material-removing process is performed including processing the semiconductor wafers between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 0.5-15.0 ?m.Type: GrantFiled: October 12, 2010Date of Patent: April 1, 2014Assignee: Siltronic AGInventors: Juergen Schwandner, Thomas Buschhardt, Diego Feijoo, Michael Kerstan, Georg Pietsch, Guenter Schwab
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Patent number: 8647985Abstract: Semiconductor material substrates are polished by a method including at least one polishing step A by means of which the substrate is polished on a polishing pad containing an abrasive material bonded in the polishing pad and a polishing agent solution is introduced between the substrate and the polishing pad during the polishing step; and at least one polishing step B by means of which the substrate is polished on a polishing pad containing an abrasive material-containing polishing pad and wherein a polishing agent slurry containing unbonded abrasive material is introduced between the substrate and the polishing pad during the polishing step.Type: GrantFiled: July 2, 2008Date of Patent: February 11, 2014Assignee: Siltronic AGInventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert, Georg Pietsch
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Patent number: 8512099Abstract: A device for double-sided processing of flat workpieces has upper and lower working discs forming between them a working gap containing a carrier disc with cutout(s) for workpiece(s), the carrier disc having circumferential teeth by means of which it rolls on an inner and an outer gear wheel or pin ring, wherein the gear wheels or pin rings have a multiplicity of gear or pin arrangements which engage the teeth of the carrier discs during rolling, at least one of the pin arrangements having a guide which delimits movement of the margin of the carrier disc in at least one axial direction, the guide formed by a circumferential shoulder or a circumferential groove.Type: GrantFiled: October 19, 2009Date of Patent: August 20, 2013Assignees: Siltronic AG, Peter Wolters GmbHInventors: Michael Kerstan, Georg Pietsch, Frank Runkel, Conrad von Bechtolsheim, Helge Moeller
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Publication number: 20130072093Abstract: A method for simultaneous double-side material-removing processing of at least three workpieces includes disposing the workpieces in a working gap between rotating upper and lower working disks of a double-side processing apparatus. The workpieces lie in freely movable fashion in respective openings in a guide cage and are moved under pressure in the working gap using the guide cage. Upon attaining a preselected target thickness of the workpieces, a deceleration process is initiated that includes reducing an angular velocity ?i(t) of a respective drive i of each of the upper working disk, lower working disk and guide cage to a standstill. The reducing is carried out such that ratios of the angular velocities ?i(t) with respect to one another as a function of time t deviate by no more than 10% from initial ratios of the angular velocities ?i(t) corresponding to when the preselected target thickness was attained.Type: ApplicationFiled: September 4, 2012Publication date: March 21, 2013Applicant: SILTRONIC AGInventor: Georg Pietsch
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Patent number: 8398878Abstract: Semiconductor wafers are polished by a material-removing polishing process A, on both sides of the wafer, using an abrasive-free polishing pad, and a polishing agent which contains abrasive; and a material-removing polishing process B, on at least one side of the wafer, using a polishing pad with a microstructured surface containing no materials which contact the wafer which are harder than the semiconductor material, and a polishing agent is added which has a pH? to 10 and contains no substances with abrasive action. Preferred is a method for producing a semiconductor wafer, comprising the following ordered steps: separating a semiconductor single crystal into wafers; simultaneously processing both sides of the wafer by chip-removing processing; polishing the wafer, comprising a polishing process A and a polishing process B; and CMP of one side of the wafer, removing <1 ?m.Type: GrantFiled: April 6, 2010Date of Patent: March 19, 2013Assignee: Siltronic AGInventor: Georg Pietsch
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Publication number: 20130011227Abstract: A multiplicity of wafer-type workpieces are buffer stored in a device having, a frame, at least two transport elements which each circulate in a vertical direction around an upper and a lower deflection device connected to the frame and are provided, at uniform intervals, with a multiplicity of bearing areas for the horizontal mounting of workpieces, wherein at least one of the deflection devices of each transport element is driven and a free space is situated between the transport elements, a loading position between the upper deflection devices at which a workpiece can be placed onto corresponding bearing areas, and a stationary removal device below the loading position, comprising a horizontal transport device, the first end of which lies within the free space between the transport elements. The invention also relates to a method for buffer-storing a multiplicity of wafer-type workpieces using the abovementioned device.Type: ApplicationFiled: June 22, 2012Publication date: January 10, 2013Applicant: SILTRONIC AGInventor: Georg Pietsch
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Publication number: 20120190277Abstract: An insert carrier is configured to receive at least one semiconductor wafer for double-side processing of the wafer between two working disks of a lapping, grinding or polishing process. The insert carrier includes a core of a first material that has a first surface and a second surface, and at least one opening configured to receive a semiconductor wafer. A coating at least partially covers the first and second surfaces of the core. The coating includes a surface remote from the core that includes a structuring including elevations and depressions. A correlation length of the elevations and depressions is in a range of 0.5 mm to 25 mm and an aspect ratio of the structuring is in a range of 0.0004 to 0.4.Type: ApplicationFiled: December 6, 2011Publication date: July 26, 2012Applicant: SILTRONIC AGInventors: Georg Pietsch, Michael Kerstan
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Publication number: 20120189777Abstract: A method provides a respective flat working layer on each of two working disks of a double-side processing apparatus including a ring-shaped upper working disk, a ring shaped lower working disk and a rolling apparatus that are rotatably mounted about an axis of symmetry of the double-side processing apparatus. The method includes applying a lower intermediate layer and upper intermediate layer on respective surfaces of the lower and upper working disks. Then, simultaneous leveling of both intermediate layers is performed by moving trimming apparatuses on cycloidal paths over the intermediate layers using the rolling apparatus and the respective outer toothing under pressure and with addition of a cooling lubricant, so as to provide a material removal from the intermediate layers. A lower working layer of uniform thickness is then applied to the lower intermediate layer and an upper working layer of uniform thickness is applied to the upper intermediate layer.Type: ApplicationFiled: January 13, 2012Publication date: July 26, 2012Applicant: SILTRONIC AGInventor: Georg Pietsch
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Publication number: 20120156970Abstract: A method for the simultaneous material-removing processing of both sides of at least three semiconductor wafers includes providing a double-side processing apparatus including two rotating ring-shaped working disks and a rolling apparatus. The carriers are arranged in the double-side processing apparatus and the openings are disposed in the carriers so as to satisfy the inequality: R/e·sin(?/N*)?r/e?1?1.2 where N* denotes a ratio of the round angle and an angle at which adjacent carriers are inserted into the rolling apparatus with the greatest distance with respect to one another, r denotes a radius of each opening for receiving a respective semiconductor wafer, e denotes a radius of a pitch circle around a midpoint of the carrier on which the opening is arranged, and R denotes a radius of the pitch circle on which the carriers move between the working disks by means of the rolling apparatus.Type: ApplicationFiled: December 7, 2011Publication date: June 21, 2012Applicant: SILTRONIC AGInventor: Georg Pietsch
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Patent number: 8113913Abstract: Simultaneous double-side grinding of a plurality of semiconductor wafers involves positioning each wafer freely in a cutout of one of plural carriers which rotate on a cycloidal trajectory, wherein the wafers are machined between two rotating ring-shaped working disks, each disk having a working layer of bonded abrasive, wherein the form of the working gap between working layers is determined during grinding and the form of the working area of at least one disk is altered such that the gap has a predetermined form. The wafers, during machining, may temporarily overhang the gap. The carrier is optionally composed only of a first material, or is completely or partly coated with the first material such that during machining only the first material contacts the working layer, and the first material does not reduce the machining ability of the working layer.Type: GrantFiled: March 14, 2008Date of Patent: February 14, 2012Assignees: Siltronic AG, Peter Wolters GmbHInventors: Georg Pietsch, Michael Kerstan, Heiko aus dem Spring
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Publication number: 20120028546Abstract: A method for trimming two working layers including bonded abrasive applied on mutually facing sides of an upper and a lower working disk of a grinding apparatus configured for simultaneous double-side processing of flat workpiece includes providing the grinding apparatus including the upper and lower working disks and providing at least one carrier including an outer toothing. The upper and lower working disks are rotated. The carrier is moved between the rotating working disks using a rolling apparatus and the outer toothing on cycloidal paths relative to working layers of the working disks. Loose abrasives are added to a working gap formed between the working layers. A carrier, without workpieces inserted therein, is moved in the working gap so as to effect material removal from the working layers.Type: ApplicationFiled: July 13, 2011Publication date: February 2, 2012Applicant: Siltronic AGInventors: Georg Pietsch, Michael Kerstan
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Publication number: 20110133314Abstract: A method for producing a semiconductor wafer includes pulling a single crystal of semiconductor material, slicing a semiconductor wafer from the single crystal and polishing the semiconductor wafer with the polishing pad and polishing agent. The polishing agent is free of solid materials having abrasive action and the polishing pad contains fixedly bonded solid materials with abrasive action. During polishing the polishing agent is supplied in a gap between the semiconductor wafer and polishing pad. The polishing agent has a pH value in a range of 9.5 to 12.5.Type: ApplicationFiled: November 4, 2010Publication date: June 9, 2011Applicant: SILTRONIC AGInventors: Georg Pietsch, Walter Haeckl, Juergen Schwandner, Noemi Banos
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Publication number: 20110097975Abstract: A method for producing a semiconductor wafer sliced from a single crystal includes rounding an edge using a grinding disk containing abrasives with an average grain size of 20.0-60.0 ?m. A first simultaneous double-side material-removing process is performed wherein the semiconductor wafers are processed between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 5.0-20.0 ?m, wherein the semiconductor wafer is placed in a cutout in one of a plurality of carriers rotatable by a rolling apparatus such that the semiconductor wafer lies in a freely movable manner in the carrier and the wafer is movable on a cycloidal trajectory. A second simultaneous double-side material-removing process is performed including processing the semiconductor wafers between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 0.5-15.0 ?m.Type: ApplicationFiled: October 12, 2010Publication date: April 28, 2011Applicant: SILTRONIC AGInventors: Juergen SCHWANDNER, Thomas BUSCHHARDT, Diego FEIJOO, Michael KERSTAN, Georg PIETSCH, Guenter SCHWAB
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Patent number: 7867059Abstract: The invention relates to a process for producing a semiconductor wafer by double-side grinding of the semiconductor wafer, in which the semiconductor wafer is simultaneously ground on both sides, first by rough-grinding and then by finish-grinding, using a grinding tool. The semiconductor wafer, between the rough-grinding and the finish-grinding, remains positioned in the grinding machine, and the grinding tool continues to apply a substantially constant load during the transition from rough-grinding to finish-grinding. The invention also relates to an apparatus for carrying out the process and to a semiconductor wafer having a local flatness value on a front surface of less than 16 nm in a measurement window of 2 mm×2 mm area and of less than 40 nm in a measurement window of 10 mm×10 mm area.Type: GrantFiled: November 16, 2007Date of Patent: January 11, 2011Assignee: Siltronic AGInventors: Georg Pietsch, Michael Kerstan, Werner Blaha
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Publication number: 20100323586Abstract: Semiconductor wafers are polished by a material-removing polishing process A, on both sides of the wafer, using an abrasive-free polishing pad, and a polishing agent which contains abrasive; and a material-removing polishing process B, on at least one side of the wafer, using a polishing pad with a microstructured surface containing no materials which contact the wafer which are harder than the semiconductor material, and a polishing agent is added which has a pH? to 10 and contains no substances with abrasive action. Preferred is a method for producing a semiconductor wafer, comprising the following ordered steps: separating a semiconductor single crystal into wafers; simultaneously processing both sides of the wafer by chip-removing processing; polishing the wafer, comprising a polishing process A and a polishing process B; and CMP of one side of the wafer, removing <1 ?m.Type: ApplicationFiled: April 6, 2010Publication date: December 23, 2010Inventor: Georg Pietsch
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Patent number: 7815489Abstract: A method for the simultaneous double-side grinding of a plurality of semiconductor wafers, involves a process wherein each semiconductor wafer lies such that it is freely moveable in a cutout of one of a plurality of carriers caused to rotate by means of a rolling apparatus and is thereby moved on a cycloidal trajectory, wherein the semiconductor wafers are machined in material-removing fashion between two rotating working disks, wherein each working disk comprises a working layer containing bonded abrasive. The method according to the invention makes it possible, by means of specific kinematics, to produce extremely planar semiconductor wafers.Type: GrantFiled: July 9, 2007Date of Patent: October 19, 2010Assignees: Siltronic AG, Peter Wolters GmbHInventors: Georg Pietsch, Michael Kerstan, Heiko aus dem Spring