Abstract: A method and apparatus for processing data packets in flow-aware network nodes is disclosed for storing flow data without altering transmission data throughput for a limited cost. The method and apparatus for processing data packets in flow-aware network nodes includes alternate usage of a fast access internal memory and a slower speed access external memory which provides low latency yet comprehensive flow-awareness. The method for processing data packets in flow-aware network nodes is particularly useful for overcoming requiring extensive usage of fast access memory of flow-aware network nodes known in the art.

Abstract: The present invention refers to a method for reducing energy consumption in a packet processing linecard of a packet transmission network, said packet processing linecard comprising a plurality of microprocessors aimed at processing packet traffic wherein the number of active microprocessors is dynamically adjusted as a function of the computation of a traffic estimator based on a recurrent estimation of at least two statistical parameters including the average and a parameter representative of the statistical distribution of the packet traffic.

Abstract: In one embodiment, a network communication node receives data and includes a plurality of processors aimed at processing data at a given layer of communication so as to route them towards a given destination. The node determines at least one layer of communication for processing the received data.

Abstract: The invention concerns a method for scheduling packets belonging to a plurality of flows received at a router. It is also provided the system for carrying out the method. According to the invention, a single packet queue is used for storing said packets, said single packet queue being adapted to be divided into a variable number of successive sections which are created and updated dynamically as a function of each received packet, each section being of variable size and a section load threshold for each flow of said plurality of flows being allocated to each section. The method further comprises insertion (S11; S22; S210; S222; S230) of each received packet of a given flow in one of said successive sections as a function of said given flow and of the corresponding section load threshold.

Abstract: The present invention refers to a method for reducing energy consumption in a packet processing linecard of a packet transmission network, said packet processing linecard comprising a plurality of microprocessors aimed at processing packet traffic wherein the number of active microprocessors is dynamically adjusted as a function of the computation of a traffic estimator based on a recurrent estimation of at least two statistical parameters including the average and a parameter representative of the statistical distribution of the packet traffic.

Abstract: A method and apparatus for processing data packets in flow-aware network nodes is disclosed for storing flow data without altering transmission data throughput for a limited cost. The method and apparatus for processing data packets in flow-aware network nodes includes alternate usage of a fast access internal memory and a slower speed access external memory which provides low latency yet comprehensive flow-awareness. The method for processing data packets in flow-aware network nodes is particularly useful for overcoming requiring extensive usage of fast access memory of flow-aware network nodes known in the art.

Abstract: The present invention relates to a method of operating a scheduler (100) of a crossbar switch (200), wherein said scheduler (100) comprises a tree structure comprising an input stage (IS) with a plurality of entry modules (E—1, E—2, . . . ) and at least one decider stage (DS—1, DS—2, . . . ), wherein each decider stage (DS—1, DS—2, . . . ) comprises at least one decider module (D—1—1, D—2—1, . . . ), wherein one or more modules (E—1, E—2, D—1—1, D—1—2, . . . ) are connected to a decider module (D—1—1, D—2—1, . . . ) of a subsequent decider stage (DS—1, DS—2, . . . ), wherein a packet reference is forwarded from said input stage (IS) or a decider stage to a subsequent decider stage depending on a forwarding decision that is made in a decider module (D—1—1, D—2—1, . . .

Abstract: A device for coupling high-frequency signals between a first component and a second component is adapted to supply a first bias voltage-current pair to the first component and a second bias voltage-current pair to the second component.

Abstract: The invention concerns a method for scheduling packets belonging to a plurality of flows received at a router. It is also provided the system for carrying out the method. According to the invention, a single packet queue is used for storing said packets, said single packet queue being adapted to be divided into a variable number of successive sections which are created and updated dynamically as a function of each received packet, each section being of variable size and a section load threshold for each flow of said plurality of flows being allocated to each section. The method further comprises insertion (S11; S22; S210; S222; S230) of each received packet of a given flow in one of said successive sections as a function of said given flow and of the corresponding section load threshold.

Abstract: To selectively route stand-by packets in input modules to destination output modules via a switching matrix, distributed arbitration functions are executable by successive arbitration cycles. Each cycle comprises: a first phase executable by each input controller to send each output controller requests representative of the quantities of required stand-by packets; a second phase executable by each output controller to determine the quantity of admissible packets depending on the requests; a third phase executable by a central arbitration unit to determine allowed aggregate quantities depending on all the admissible quantities; and a fourth phase executable by each input controller to determine the allowed packet quantities depending on the admissible quantities and of the allowed aggregate quantities.

Abstract: In order to switch selectively via a packets switching matrix waiting in the input modules (IMi) to address output modules, an arbitration function (CSC) selects by successive cycles, from all the pairs of input and output modules, separate subsets. Each cycle comprises p successive phases (x) associated respectively to p arbitration functions. Processing units (PUi) each execute the p functions, each function acting on three parameters termed “residual required quantity”, “input capacity” and “output capacity”, the values of which are related to a single pair and are set at the start of the cycle. Each phase consists of N successive steps (y) associated respectively to said subsets, each step being executed in parallel by the processing units (PUi) in order to calculate by means of the arbitration functions the “partial” accepted quantity values and to reset the parameters for the next step. Application to telecommunication networks, particularly multiservice.

Abstract: The switching system includes input modules (IM1, IM2, IMi, IMn) each connected to a switching matrix (1) and to a corresponding controller (2). Each input module (IMi) organizes packets that it receives into digital data blocks with a fixed size, and makes transfers of these blocks by successive cycles to the matrix (1). Each of these blocks is organized into groups of digital data, these groups having corresponding modifiable sizes and being stored according to a predetermined order and associated with the corresponding output ports (OP1, OP2, OPj, OPn) in the system. Each of these groups is formed of packets to be sent to a single corresponding output port. Any block transfer to the matrix (1) is accompanied by transmission of information representative of the corresponding sizes of the groups of the transferred block to the said controller (2), and the groups of each transferred block are switched to their corresponding destination output ports as a function of this information representing the sizes.

Abstract: A device for coupling high-frequency signals between a first component and a second component is adapted to supply a first bias voltage-current pair to the first component and a second bias voltage-current pair to the second component.

Abstract: In order to switch selectively via a packets switching matrix waiting in the input modules (IMi) to address output modules, an arbitration function (CSC) selects by successive cycles, from all the pairs of input and output modules, separate subsets. Each cycle comprises p successive phases (x) associated respectively to p arbitration functions. Processing units (PUi) each execute the p functions, each function acting on three parameters termed “residual required quantity”, “input capacity” and “output capacity”, the values of which are related to a single pair and are set at the start of the cycle. Each phase consists of N successive steps (y) associated respectively to said subsets, each step being executed in parallel by the processing units (PUi) in order to calculate by means of the arbitration functions the “partial” accepted quantity values and to reset the parameters for the next step. Application to telecommunication networks, particularly multiservice.

Abstract: To selectively route stand-by packets in input modules (IMi) to destination output modules (OMj) via a switching matrix (1), distributed arbitration functions are executable by successive arbitration cycles. Each cycle comprises: a first phase executable by each input controller (ICi) to send each output controller (OCj) requests representative of the quantities of “required” stand-by packets, a second phase executable by each output controller (OCj) to determine the quantity of “admissible” packets depending on the requests. a third phase executable by a central arbitration unit (CSC) to determine “allowed aggregate” quantities depending on all the admissible quantities. a fourth phase executable by each input controller (ICi) to determine the allowed packet quantities depending on the admissible quantities and of the allowed aggregate quantities.

Abstract: The present invention relates to a method of operating a scheduler (100) of a crossbar switch (200), wherein said scheduler (100) comprises a tree structure comprising an input stage (IS) with a plurality of entry modules (E—1, E—2, . . . ) and at least one decider stage (DS—1, DS—2, . . . ), wherein each decider stage (DS—1, DS—2, . . . ) comprises at least one decider module (D—1—1, D—2—1, . . . ), wherein one or more modules (E—1, E—2, D—1—1, D—1—2, . . . ) are connected to a decider module (D—1—1, D—2—1, . . . ) of a subsequent decider stage (DS—1, DS—2, . . . ), wherein a packet reference is forwarded from said input stage (IS) or a decider stage to a subsequent decider stage depending on a forwarding decision that is made in a decider module (D—1—1, D—2—1, . . .

Abstract: The switching system comprises input modules (IM1, IM2, IMi, IMn) each connected to a switching matrix (1) and to a corresponding controller (2). Each input module (IMi) organizes packets that it receives into digital data blocks with a fixed size, and makes transfers of these blocks by successive cycles to the matrix (1). Each of these blocks is organized into groups of digital data, these groups having corresponding modifiable sizes and being stored according to a predetermined order and associated with the corresponding output ports (OP1, OP2, OPj, OPn) in the system. Each of these groups is formed of packets to be sent to a single corresponding output port. Any block transfer to the matrix (1) is accompanied by transmission of information representative of the corresponding sizes of the groups of the transferred block to the said controller (2), and the groups of each transferred block are switched to their corresponding destination output ports as a function of this information representing the sizes.