Abstract: An apparatus and a method for the synchronization of an asynchronous signal in synthesis and simulation of a clocked circuit are disclosed, in which a circuit to be simulated and tested is described with a hardware description language and the asynchronous signals present therein are marked. For producing a network list, the hardware description language is processed with a synthesis tool, in which a specific synchronization module is inserted at every marking. For testing the time behavior of the signals in the clocked circuit on the basis of the network list, a simulator implements a logic/timing simulation, in which a test of the time behavior is selectively deactivated for each inserted synchronization module. The unknown statusses that still occur are output via a display.

Abstract: The invention relates to a method for assuring compatibility between the software units activated in partial computer systems (system A, system B) belonging to a distributed computer system, said software units each comprising their respective version of software codes and/or data. Once a compatibility test has established compatibility, a compatible non-activated software unit is activated on its partial computer system and the corresponding previously activated software unit is deactivated. The invention also relates to a method for securing data within a distributed computer system with several partial computer systems, for blocking access to the data, for securing common data and for deactivating the data access block are carried out according to the current status of the data securing option.

Abstract: A circuit for spike-free clock switching which offers asynchronous switching between two clock signals of the same frequency and of any desired phase angle, which is purely digital, which can be fully implemented in an integrated module, and which avoids spikes/glitches during switching.