Abstract: A qubit system includes a substrate layer, a qubit circuit suspended above the substrate layer and fine structure disposed between the qubit circuit and the substrate layer.

Abstract: A qubit system includes a substrate layer, a qubit circuit suspended above the substrate layer and fine structure disposed between the qubit circuit and the substrate layer.

Abstract: A coplanar waveguide device includes a coplanar waveguide structure disposed on a substrate, at least one qubit coupled to the coplanar waveguide structure and an add-on chip having a metallized trench, and disposed over the substrate.

Abstract: A method for fabricating a chip surface base includes preparing a first substrate, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias, preparing a second substrate, bonding the first and second substrates and exposing the metal fillings. A method for fabricating a chip surface base includes preparing a first and second substrate, depositing a metal on at least one of the first and second substrates, bonding the first and second substrates, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias and exposing the metal fillings. A chip surface base device includes a first substrate, a second substrate, a metal layer disposed between the first and second substrates and a plurality vias disposed on the first substrate.

Abstract: A coplanar waveguide device includes a coplanar waveguide structure disposed on a substrate, at least one qubit coupled to the coplanar waveguide structure and an add-on chip having a metallized trench, and disposed over the substrate.

Abstract: A method for fabricating a chip surface base includes preparing a first substrate, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias, preparing a second substrate, bonding the first and second substrates and exposing the metal fillings. A method for fabricating a chip surface base includes preparing a first and second substrate, depositing a metal on at least one of the first and second substrates, bonding the first and second substrates, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias and exposing the metal fillings. A chip surface base device includes a first substrate, a second substrate, a metal layer disposed between the first and second substrates and a plurality of vias disposed on the first substrate.

Abstract: A coplanar waveguide device includes a coplanar waveguide structure disposed on a substrate, at least one qubit coupled to the coplanar waveguide structure and an add-on chip having a metallized trench, and disposed over the substrate.

Abstract: A coplanar waveguide device includes a coplanar waveguide structure disposed on a substrate, at least one qubit coupled to the coplanar waveguide structure and an add-on chip having a metallized trench, and disposed over the substrate.

Abstract: A coplanar waveguide device includes a coplanar waveguide structure disposed on a substrate, at least one qubit coupled to the coplanar waveguide structure and an add-on chip having a metallized trench, and disposed over the substrate.

Abstract: A qubit system includes a substrate layer, a qubit circuit suspended above the substrate layer and fine structure disposed between the qubit circuit and the substrate layer.

Abstract: A qubit system includes a substrate layer, a qubit circuit suspended above the substrate layer and fine structure disposed between the qubit circuit and the substrate layer.

Abstract: A qubit system includes a substrate layer, a qubit circuit suspended above the substrate layer and fine structure disposed between the qubit circuit and the substrate layer.

Abstract: A method for fabricating a chip surface base includes preparing a first substrate, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias, preparing a second substrate, bonding the first and second substrates and exposing the metal fillings. A method for fabricating a chip surface base includes preparing a first and second substrate, depositing a metal on at least one of the first and second substrates, bonding the first and second substrates, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias and exposing the metal fillings. A chip surface base device includes a first substrate, a second substrate, a metal layer disposed between the first and second substrates and a plurality of vias disposed on the first substrate.

Abstract: Low-loss superconducting devices and methods for fabricating low loss superconducting devices. For example, superconducting devices, such as superconducting resonator devices, are formed with a (200)-oriented texture titanium nitride (TiN) layer to provide high Q, low loss resonator structures particularly suitable for application to radio-frequency (RF) and/or microwave superconducting resonators, such as coplanar waveguide superconducting resonators. In one aspect, a method of forming a superconducting device includes forming a silicon nitride (SiN) seed layer on a substrate, and forming a (200)-oriented texture titanium nitride (TiN) layer on the SiN seed layer.

Abstract: A method for fabricating a chip surface base includes preparing a first substrate, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias, preparing a second substrate, bonding the first and second substrates and exposing the metal fillings. A method for fabricating a chip surface base includes preparing a first and second substrate, depositing a metal on at least one of the first and second substrates, bonding the first and second substrates, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias and exposing the metal fillings. A chip surface base device includes a first substrate, a second substrate, a metal layer disposed between the first and second substrates and a plurality vias disposed on the first substrate.

Abstract: A qubit system includes a substrate layer, a qubit circuit suspended above the substrate layer and fine structure disposed between the qubit circuit and the substrate layer.

Abstract: An apparatus and method for manufacturing a superconducting low-pass filter for quantum computing devices. The apparatus includes a plurality of containers and input and output ports connected to opposite ends of the apparatus. A plurality of coils of superconducting wire are wound using a mandrel. An adhesive is applied to the coils for maintaining a wound state. Each of the coils are positioned in each of the containers and electrically connected to each other with at least one coil being connected to the input port and at least one coil being connected to the output port. The coils are released or expanded from their wound state using an adhesive solvent. The containers are then filled with a conductive polymer and the containers are closed with one or more covers.

Abstract: Low-loss superconducting devices and methods for fabricating low loss superconducting devices. For example, superconducting devices, such as superconducting resonator devices, are formed with a (200)-oriented texture titanium nitride (TiN) layer to provide high Q, low loss resonator structures particularly suitable for application to radio-frequency (RF) and/or microwave superconducting resonators, such as coplanar waveguide superconducting resonators. In one aspect, a method of forming a superconducting device includes foaming a silicon nitride (SiN) seed layer on a substrate, and forming a (200)-oriented texture titanium nitride (TiN) layer on the SiN seed layer.

Abstract: A method for determining whether a quantum system comprising a superconducting qubit is occupying a first basis state or a second basis state once a measurement is performed is provided. The method, comprising: applying a signal having a frequency through a transmission line coupled to the superconducting qubit characterized by two distinct, separate, and stable states of differing resonance frequencies each corresponding to the occupation of the first or second basis state prior to measurement; and measuring at least one of an output power or phase at an output port of the transmission line, wherein the measured output power or phase is indicative of whether the superconducting qubit is occupying the first basis state or the second basis state.

Abstract: An improved persistent current switch design and method of operation are disclosed. By way of example, a persistent current switch circuit comprises a heating element and a switch element located proximate to the heating element, the switch element being substantially formed from a material (by way of example only, titanium) which exhibits a superconducting temperature value below a superconducting temperature value exhibited by a material (by way of example only, aluminum) used to provide a connection to the switch element. The switch element is responsive to the heating element such that the heating element is used to control whether or not the switch element is in a superconducting state. The switch element may also have a folded geometry. Such persistent current switches exhibit low power and low inductance.