Abstract: A microelectronic assembly (10) incorporating a particulate free underfill material (32 includes a substrate (24) having a plurality of bond pads (26) disposed on a substantially planar die attach region (24), and an integrated circuit die (12) having a die face (16) and a plurality of bond pads (20). The die face (16) is superimposed over the substrate die attach region (24) so that each of the die face bond pads (20) is generally aligned with a corresponding one of the substrate bond pads (26) and such that the die face is spaced apart from the die attach region by a gap not greater than about 20 microns. Each of the die face bond pads (20) is connected to its corresponding one of the substrate bond pads (26) by a solder connection (30). A particulate free polymeric material (32) is disposed in the gap, with the polymeric material substantially encapsulating each of the solder connections.

Abstract: A microelectronic package (10) is formed and includes an integrated circuit die (12) attached to a substrate (14) by a plurality of solder bump interconnections (16) to form a preassembly (18). The integrated circuit die (12) has an active face (20) that faces the substrate (14) and is spaced apart therefrom by a gap (22). The integrated circuit die (12) also includes a back face (24) opposite the active face (20). The substrate (14) includes a die attach region (26) and a surrounding region (28) about the integrated circuit die (12). The solder bump interconnections (16) extend across the gap (22) and connect the integrated circuit die (12) and the substrate (14). A mold (30) is disposed about the preassembly (18) such that the mold (30) cooperates with the substrate (14) to define a mold cavity (32) that encloses the integrated circuit die (12).

Abstract: A microelectronic assembly (10) includes a polymeric card (12) that includes a substantially planar major surface (18). An integrated circuit component (14) is embedded in the polymeric card (12) and has a first contact (20) and a second contact (22). An antenna element (16) is formed of a singular metallic strip and includes a first terminal (26) electrically connected to the first contact (20), a second terminal (28) electrically connected to the second contact (22), and a loop (30) intermediate the first terminal (26) and the second terminal (28). The first terminal (26) includes a first outer surface (32) and the second terminal (28) includes a second outer surface (34). The first outer surface (32) and the second outer surface (34) are exposed at the major surface (18) and are coextensive therewith. The loop (30) is embedded within the polymeric card (12) and spaced apart from the major surface (18).

Abstract: A microelectronic package (10) is formed and includes an integrated circuit die (12) attached to a substrate (14) by a plurality of solder bump interconnections (16) to form a preassembly (18). The integrated circuit die (12) has an active face (20) that faces the substrate (14) and is spaced apart therefrom by a gap (22). The integrated circuit die (12) also includes a back face (24) opposite the active face (20). The substrate (14) includes a die attach region (26) and a surrounding region (28) about the integrated circuit die (12). The solder bump interconnections (16) extend across the gap (22) and connect the integrated circuit die (12) and the substrate (14). A mold (30) is disposed about the preassembly (18) such that the mold (30) cooperates with the substrate (14) to define a mold cavity (32) that encloses the integrated circuit die (12).

Abstract: A microelectronic assembly (10) includes an integrated circuit component (14) attached to a polymeric substrate (12) by a plurality of unencapsulated solder bump interconnections (16). A collar (18) is affixed to the polymeric substrate (12) about the integrated circuit component (14) and is formed of an inorganic material having a coefficient of thermal expansion less than that of the substrate (12). The collar (18) constrains thermal expansion of the polymeric substrate (12) in the die attach region (22), thereby lessening any deleterious effects caused by a mismatch in the thermal expansion of the polymeric substrate (12) and the integrated circuit component (14).