Patents by Inventor George B. Arsintescu

George B. Arsintescu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8719764
    Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: May 6, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventor: George B. Arsintescu
  • Patent number: 8612922
    Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: December 17, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventor: George B. Arsintescu
  • Publication number: 20100325597
    Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.
    Type: Application
    Filed: August 31, 2010
    Publication date: December 23, 2010
    Applicant: Cadence Design Systems, Inc.
    Inventor: George B. Arsintescu
  • Patent number: 7802222
    Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: September 21, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventor: George B. Arsintescu
  • Publication number: 20090077513
    Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.
    Type: Application
    Filed: November 25, 2008
    Publication date: March 19, 2009
    Applicant: CADENCE DESIGN SYSTEMS, INC.
    Inventor: George B. ARSINTESCU
  • Publication number: 20090077505
    Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.
    Type: Application
    Filed: November 25, 2008
    Publication date: March 19, 2009
    Applicant: CADENCE DESIGN SYSTEMS, INC.
    Inventor: George B. ARSINTESCU
  • Publication number: 20080077901
    Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.
    Type: Application
    Filed: September 25, 2006
    Publication date: March 27, 2008
    Inventor: George B. Arsintescu