Patents by Inventor George B. Arsintescu
George B. Arsintescu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8719764Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.Type: GrantFiled: November 25, 2008Date of Patent: May 6, 2014Assignee: Cadence Design Systems, Inc.Inventor: George B. Arsintescu
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Patent number: 8612922Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.Type: GrantFiled: November 25, 2008Date of Patent: December 17, 2013Assignee: Cadence Design Systems, Inc.Inventor: George B. Arsintescu
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Publication number: 20100325597Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.Type: ApplicationFiled: August 31, 2010Publication date: December 23, 2010Applicant: Cadence Design Systems, Inc.Inventor: George B. Arsintescu
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Patent number: 7802222Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.Type: GrantFiled: September 25, 2006Date of Patent: September 21, 2010Assignee: Cadence Design Systems, Inc.Inventor: George B. Arsintescu
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Publication number: 20090077513Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.Type: ApplicationFiled: November 25, 2008Publication date: March 19, 2009Applicant: CADENCE DESIGN SYSTEMS, INC.Inventor: George B. ARSINTESCU
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Publication number: 20090077505Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.Type: ApplicationFiled: November 25, 2008Publication date: March 19, 2009Applicant: CADENCE DESIGN SYSTEMS, INC.Inventor: George B. ARSINTESCU
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Publication number: 20080077901Abstract: Techniques are provided to allow users of Electronic Design Automation (EDA) tools to define constraint template types for efficiently associating constraints with design objects to specify design intent. Processes for creating and validating the constraints are provided by user-defined plug-ins, thereby allowing users to annotate circuit designs with constraints for proprietary layout and fabrication processes without exposing the constraints to tool vendors or competitors. The constraints are re-created from the template types whenever the circuit design is loaded into the EDA tool, so that the constraints are based upon the latest version of the template type. The constraints are also re-created when validation fails. Constraint groups are reusable in different designs, technology nodes, and processes because they automatically expand to provide the specific constraints to achieve a goal.Type: ApplicationFiled: September 25, 2006Publication date: March 27, 2008Inventor: George B. Arsintescu