Patents by Inventor George B. Norris

George B. Norris has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8934504
    Abstract: In accordance with some embodiments of the present disclosure, a method may include determining a range of frequencies allocated to resource blocks to be transmitted during a subsequent sub-frame slot or sounding reference symbol sub-slot. The method may also include determining an approximate center frequency of the range of frequencies. The method may additionally include modulating resource blocks of the sub-frame or sounding reference symbol sub-slot at the approximate center frequency. The method may further include transmitting the modulated resource blocks at the approximate center frequency.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: January 13, 2015
    Assignee: Intel IP Corporation
    Inventors: Daniel B. Schwartz, David Harnishfeger, Jeffrey D. Ganger, George B. Norris, Bing Xu, Mark Alan Kirschenmann, Claudio Rey
  • Patent number: 8548400
    Abstract: Systems and techniques are described for applying a polar bias modulation having a phase component and an amplitude component to a signal amplified by a power amplifier. The power amplifier (PA) has a plurality of amplifier gain stages and is configured to amplify an input to create an amplifier output signal. The input to the power amplitude is phase modulated based upon the phase component of the polar bias modulation, but need not be amplitude modulated. Amplitude modulation is provided by logic that includes a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: October 1, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kevin B. Traylor, Richard B. Meador, George B. Norris, David S. Peckham
  • Publication number: 20130039368
    Abstract: In accordance with some embodiments of the present disclosure, a method may include determining a range of frequencies allocated to resource blocks to be transmitted during a subsequent sub-frame slot or sounding reference symbol sub-slot. The method may also include determining an approximate center frequency of the range of frequencies. The method may additionally include modulating resource blocks of the sub-frame or sounding reference symbol sub-slot at the approximate center frequency. The method may further include transmitting the modulated resource blocks at the approximate center frequency.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Daniel B. Schwartz, David Harnishfeger, Jeffrey D. Ganger, George B. Norris, Bing Xu, Mark Alan Kirschenmann, Claudio Rey
  • Patent number: 8311495
    Abstract: Embodiments include methods and apparatus for detecting a phase angle between an incident signal and a reflected signal. The apparatus comprises a plurality of phase shifters and additional circuitry. The plurality of phase shifters is adapted to apply first phase shifts to a representation of the incident signal and to apply second phase shifts to a representation of the reflected signal. The additional circuitry, which is operatively coupled to the plurality of phase shifters, is adapted to produce a first indication of a location of a relative phase difference between the incident signal and the reflected signal within a first region of a first reference circle, and to produce a second indication of the location of the relative phase difference within a second region of a second reference circle, wherein the second reference circle is rotated with respect to the first reference circle.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: November 13, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: George B. Norris, Joseph Staudinger
  • Publication number: 20120213263
    Abstract: Embodiments include methods and apparatus for detecting a phase angle between an incident signal and a reflected signal. The apparatus comprises a plurality of phase shifters and additional circuitry. The plurality of phase shifters is adapted to apply first phase shifts to a representation of the incident signal and to apply second phase shifts to a representation of the reflected signal. The additional circuitry, which is operatively coupled to the plurality of phase shifters, is adapted to produce a first indication of a location of a relative phase difference between the incident signal and the reflected signal within a first region of a first reference circle, and to produce a second indication of the location of the relative phase difference within a second region of a second reference circle, wherein the second reference circle is rotated with respect to the first reference circle.
    Type: Application
    Filed: April 27, 2012
    Publication date: August 23, 2012
    Applicant: Freescale Semiconductor, Inc.
    Inventors: GEORGE B. NORRIS, Joseph Staudinger
  • Patent number: 8170509
    Abstract: Embodiments include methods and apparatus for detecting a phase angle between an incident signal and a reflected signal. The apparatus comprises a plurality of phase shifters and additional circuitry. The plurality of phase shifters is adapted to apply first phase shifts to a representation of the incident signal and to apply second phase shifts to a representation of the reflected signal. The additional circuitry, which is operatively coupled to the plurality of phase shifters, is adapted to produce a first indication of a location of a relative phase difference between the incident signal and the reflected signal within a first region of a first reference circle, and to produce a second indication of the location of the relative phase difference within a second region of a second reference circle, wherein the second reference circle is rotated with respect to the first reference circle.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: May 1, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: George B. Norris, Joseph Staudinger
  • Patent number: 7957707
    Abstract: A system (100, FIG. 1) performs digital pre-distortion using gain values stored in a lookup table (150). A method for performing digital pre-distortion includes identifying (310, FIG. 3) a lookup table entry, based on input data, and updating the lookup table entry by writing an updated gain value into the lookup table entry. In an embodiment, update tracking information corresponding to the lookup table entry may be updated (324) to indicate that the lookup table entry has been updated. Another embodiment includes identifying (412, FIG. 4) consecutive lookup table entries based on input data, determining (413) whether the consecutive lookup table entries have been previously updated, and performing (414) a weighted interpolation process to produce an output gain value. A previous gain value (158, FIG. 1) is used in the weighted interpolation process when at least one of the consecutive lookup table entries has not been updated.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: June 7, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Joseph Staudinger, George B. Norris
  • Patent number: 7929927
    Abstract: Embodiments include methods, apparatus, and electronic systems adapted to perform adaptive pre-distortion. Embodiments include combining an input sample with a gain value to generate a pre-distorted data sample, where the gain value is a function of at least one gain entry stored within a gain lookup table. An amplified analog signal is generated from the pre-distorted data sample, and a feedback sample is also generated, which corresponds to an antenna output signal. The antenna output signal includes the amplified analog signal. A difference indicator is generated to reflect a difference between the input sample and the feedback sample, and at least one updated gain value is generated based on a comparison between the difference indicator and at least one previous difference indicator. At least one gain entry within the gain lookup table is updated with the at least one updated gain value.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: April 19, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: George B. Norris, Jau Horng Chen, Claudio G. Rey, Joseph Staudinger
  • Patent number: 7598805
    Abstract: A balanced power amplifier that is insensitive to load line variations is provided. The balanced power amplifier is suitable for use in wireless transmitter applications, such as cellular telephones, mobile computing devices, and portable communication devices. An embodiment of such a balanced power amplifier includes an input coupler, first and second amplifier devices, and a level adjustment component. The input coupler generates a first signal component and a second signal component from an input signal, where the first signal component and the second signal component are out of phase relative to one another. The first amplifier device generates a first output signal that is influenced by the first signal component, and the second amplifier device generates a second output signal that is influenced by the second signal component. The level adjustment component is coupled between the input coupler device and the input of the first amplifier device.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: October 6, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Joseph Staudinger, George B. Norris
  • Publication number: 20090179704
    Abstract: A balanced power amplifier that is insensitive to load line variations is provided. The balanced power amplifier is suitable for use in wireless transmitter applications, such as cellular telephones, mobile computing devices, and portable communication devices. An embodiment of such a balanced power amplifier includes an input coupler, first and second amplifier devices, and a level adjustment component. The input coupler generates a first signal component and a second signal component from an input signal, where the first signal component and the second signal component are out of phase relative to one another. The first amplifier device generates a first output signal that is influenced by the first signal component, and the second amplifier device generates a second output signal that is influenced by the second signal component. The level adjustment component is coupled between the input coupler device and the input of the first amplifier device.
    Type: Application
    Filed: January 11, 2008
    Publication date: July 16, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Joseph Staudinger, George B. Norris
  • Publication number: 20090111399
    Abstract: Embodiments include methods, apparatus, and electronic systems adapted to perform adaptive pre-distortion. Embodiments include combining an input sample with a gain value to generate a pre-distorted data sample, where the gain value is a function of at least one gain entry stored within a gain lookup table. An amplified analog signal is generated from the pre-distorted data sample, and a feedback sample is also generated, which corresponds to an antenna output signal. The antenna output signal includes the amplified analog signal. A difference indicator is generated to reflect a difference between the input sample and the feedback sample, and at least one updated gain value is generated based on a comparison between the difference indicator and at least one previous difference indicator. At least one gain entry within the gain lookup table is updated with the at least one updated gain value.
    Type: Application
    Filed: October 29, 2007
    Publication date: April 30, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: George B. Norris, Jau Horng Chen, Claudio G. Rey, Joseph Staudinger
  • Publication number: 20080298500
    Abstract: In an embodiment, a digital pre-distortion apparatus processes an input signal to produce a pre-distorted signal, and processes the pre-distorted signal to produce a feedback signal. The apparatus also rotates an adjustment gain by a gain rotation angle to produce a rotated adjustment gain, where the gain rotation angle is based on a phase difference between the input signal and the feedback signal. The apparatus also applies the rotated adjustment gain to the feedback signal, which may result in rotation of the feedback signal into a target phase region.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 4, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: George B. Norris, Joseph Staudinger, Jau-Horng Chen
  • Patent number: 7440731
    Abstract: A radio frequency (“RF”) power amplifier circuit as described herein is configured to detect and measure an output load mismatch and to adjust the operating characteristics of the RF power amplifier to reduce output signal distortion. The circuit includes a directional RF signal coupler that obtains a coupled reflected RF signal that is indicative of the output load mismatch. The coupled reflected RF signal is processed to generate one or more bias control signals for the RF power amplifier. In operation, a mismatch condition will result in a measurable coupled reflected RF signal and a corresponding reduction in output power from the RF power amplifier. Ultimately, the output power control mechanism strives to maintain the RF power amplifier within a linear operating range.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: October 21, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Joseph Staudinger, Benjamin R. Gilsdorf, David A. Newman, George B. Norris, Gary W. Sadowniczak, Richard E. Sherman
  • Publication number: 20080243899
    Abstract: A system (100, FIG. 1) performs digital pre-distortion using gain values stored in a lookup table (150). A method for performing digital pre-distortion includes identifying (310, FIG. 3) a lookup table entry, based on input data, and updating the lookup table entry by writing an updated gain value into the lookup table entry. In an embodiment, update tracking information corresponding to the lookup table entry may be updated (324) to indicate that the lookup table entry has been updated. Another embodiment includes identifying (412, FIG. 4) consecutive lookup table entries based on input data, determining (413) whether the consecutive lookup table entries have been previously updated, and performing (414) a weighted interpolation process to produce an output gain value. A previous gain value (158, FIG. 1) is used in the weighted interpolation process when at least one of the consecutive lookup table entries has not been updated.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Joseph Staudinger, George B. Norris
  • Publication number: 20070290747
    Abstract: Systems and techniques are described for applying a polar bias modulation having a phase component and an amplitude component to a signal amplified by a power amplifier. The power amplifier (PA) has a plurality of amplifier gain stages and is configured to amplify an input to create an amplifier output signal. The input to the power amplitude is phase modulated based upon the phase component of the polar bias modulation, but need not be amplitude modulated. Amplitude modulation is provided by logic that includes a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 20, 2007
    Inventors: Kevin B. Traylor, Richard B. Meador, George B. Norris, David S. Peckham
  • Patent number: 7301402
    Abstract: A soft saturation detection circuit for a radio frequency (“RF”) power amplifier is configured to detect the onset of soft saturation in an unambiguous and accurate manner. The circuit compares the time derivative of a voltage signal indicative of the RF output power to the time derivative of a control voltage signal for the RF power amplifier. The circuit also employs a gating mechanism that ensures that a soft saturation indication signal is generated under appropriate operating conditions.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: November 27, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: George B. Norris, Benjamin R. Gilsdorf, David A. Newman
  • Patent number: 6160280
    Abstract: A field effect transistor structure which can serve as a low noise amplifier. The field effect transistor has a major surface and source and drain regions extending from the major surface into a body of semiconductor material. A channel region is formed in a portion of the body of semiconductor material separating the source and drain regions. The channel region has a first boundary perpendicular to the major and contiguous with the source region, a second boundary parallel to the first boundary and contiguous with the drain region, a third boundary perpendicular to the first boundary, and a fourth boundary parallel to the channel region. A first portion of the channel region is enclosed by a first border parallel to the first boundary of the channel region, a second border parallel to the second boundary of the channel region, a third boundary of the channel region, and the fourth boundary of the channel region.
    Type: Grant
    Filed: March 4, 1996
    Date of Patent: December 12, 2000
    Assignee: Motorola, Inc.
    Inventors: Fred H. Bonn, George B. Norris, John Michael Golio
  • Patent number: 5748042
    Abstract: A method and amplifier circuit (20) for conditioning a signal. The amplifier circuit (20) includes a field effect transistor (22) having a sub-harmonic termination (21) connected to a drain of the field effect transistor (22). In addition, an output impedance termination (24) is connected to the drain of the field effect transistor (22) and an input impedance termination (23) is connected to the gate of the field effect transistor (22). The sub-harmonic termination (21) reduces a non-linear component of an interference signal.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: May 5, 1998
    Assignee: Motorola, Inc.
    Inventors: George B. Norris, Joseph Staudinger, Gary W. Sadowniczak
  • Patent number: 5384273
    Abstract: A semiconductor device having a short gate length is fabricated. The short gate length is obtained by utilizing the fact that an unannealed silicon nitride can be isotropically etched while not etching an annealed silicon nitride layer. The method comprises forming a first silicon nitride 13 on a semiconductor material 10, annealing layer 13, forming an insulating layer 15, a second silicon nitride layer 17 and a masking layer 19, undercutting a portion of layers 17 and 15, removing the masking layer, annealing the second silicon nitride 17, implanting to form channel region 20 having portions 21 and 22, undercutting a portion of the insulating layer 15, removing the second silicon nitride 17 and the first silicon nitride 13 not covered by layer 15, forming gate 23 having effective gate length 30 and source/drain 25/26.
    Type: Grant
    Filed: April 26, 1994
    Date of Patent: January 24, 1995
    Assignee: Motorola Inc.
    Inventors: Robert B. Davies, Charles B. Anderson, Lawrence S. Klingbeil, Jr., George B. Norris
  • Patent number: 4652896
    Abstract: To realize a depletion-mode modulation-doped field-effect transistor with high gate-length to depletion-depth ratio that is capable of providing high power gain at millimeter-wave frequencies, an ohmic gate or a heterojunction gate is used on the n-AlGaAs/GaAs layered structure, replacing the prior art Shottky-barrier metal gate. The depletion-mode operation is desirable for analog signal amplifying circuits as opposed to the enhancement-mode device commonly used for switching or digital circuits. In the case of Schottky-barrier gate, high aspect ratio structures naturally operate in the enhancement mode, hence the need for the change in the gate electrode structure.
    Type: Grant
    Filed: June 27, 1985
    Date of Patent: March 24, 1987
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Mukunda B. Das, George B. Norris, Joseph A. Grzyb