Abstract: An apparatus is provided which allows computer programs to execute directly out of a large, sector addressable secondary memory by utilizing a relatively small, word addressable buffer memory. The system includes circuitry adapted to selectively transfer data between the secondary memory and the buffer memory so that a memory word request by the computational unit will result in either transferring the word from the buffer memory to the computational unit if the word is present in the buffer memory or transferring the data sector in which the requested word resides into buffer memory from secondary memory. The circuitry selectively transfers data sectors between the secondary and the buffer memory to continually maintain the data sector containing the addressed word and a predetermined number of directly adjacent data sectors from secondary memory in a portion of the buffer memory.

Abstract: A system for sharing a memory in a fault-tolerant computer. The memory is under the direct control and monitoring of error detecting and error diagnostic units in the fault-tolerant computer. This computer, for example, verifies that data to and from the memory is legally encoded and verifies that words read from the memory at a desired address are, in fact, actually delivered from that desired address. The present invention provides the means for a second processor, which is independent of the direct control and monitoring of the error checking and diagnostic units of the fault-tolerant computer, to share the memory of the fault-tolerant computer and includes circuitry to verify that:1. The processor has properly accessed a desired memory location in the memory;2. A data word read out from the memory is properly coded; and3. No inactive memory was erroneously outputting data onto the shared memory bus.