Abstract: A circuit for providing a regulated output voltage from a charge pump circuit while utilizing very low amounts of power, the circuit including a clock circuit for providing clock pulses to operate the charge pump circuit to produce an output voltage, a bias circuit for monitoring the output voltage of the charge pump and furnishing signals for enabling the clock circuit in response to an insufficient output voltage, and circuitry for enabling the bias circuit during a fraction of the total operating time available to the charge pump.

Abstract: In a memory array having a plurality of bitlines each connected to a plurality of memory devices having a state in which current is transferred by the memory device and a state in which current is not transferred by the device, a column select device for activating each bitline, a plurality of wordlines for activating individual memory devices joined to each bitline, apparatus for providing constant current in the conducting state of a memory device connected to a bitline, a device connecting a source voltage to a plurality of bitlines, and a reference bitline for providing an output reference signal, the improvement including apparatus for providing a source of current in addition to current through the device connecting a source voltage to a plurality of bitlines in order to charge any capacitance of a selected bitline when that bitline is selected whereby switching between memory devices joined to different bitlines is accelerated.