Abstract: Single fault tolerant isolated dual bus power input circuits and systems are provided. One input circuit comprises a first bus and a second bus configured to be coupled to first and second power sources, respectively. The first bus includes first input and return lines, the first input or return line including a switch. The second bus includes second input and return lines, the second input or return line including two switches coupled in series. A system includes multiple power sources coupled to an electronic device via the input circuit discussed above. Another system includes multiple power sources, an electronic device, and an input circuit coupling the electronic device to the power sources. The input circuit includes multiple input lines coupling the electronic device to a respective power source, wherein each input line includes a switch coupled between the electronic device and each respective power source.

Abstract: Circuitry (20) and a method are provided for limiting peak current while supplying a constant voltage to a load (42). The circuit (20) comprises an input terminal (32) for coupling to the voltage supply, current sense circuitry (26) coupled to the input terminal (32), a capacitor (30) coupled to an output terminal (40), a converter power stage (22) coupled between the current sense circuitry (26) and the output terminal (40); and a converter controller (24) having inputs coupled to the output terminal (40) and the current sense circuitry (26), and an output coupled to the converter power stage (22) for switching the converter power stage (22) from a voltage mode to a current mode.

Abstract: A DC-to-DC converter comprises a converter section and a controller section. The converter section comprises a primary section and a secondary section. The primary and secondary section includes MOSFET switches. The controller section is coupled to the converter section and comprises a pulse width modulation (PWM) section and a delay section. The PWM section comprises an error amplifier configured to generate an error signal representative of a variance between an output voltage of the converter section and a reference voltage and a PWM configured to produce a PWM signal based on the error signal. The delay section comprises of delay circuits configured to generate delayed output signals from the PWM signal and power switching device drivers coupled to the delay circuits and configured to receive the delay output signals and generate a controlled signals to control the on/off state of the MOSFET switches.

Abstract: An isolated DC-to-DC converter comprises a converter section configured to receive an input voltage and produce an isolated output voltage and a controller section configured to control the operation of the converter section to maintain the output voltage at a predetermined value by, at least in part, turning switches on and off at a certain duty cycle at a set switching frequency. The controller section comprises an isolation transformer providing primary and secondary side isolation and an error amplifier having an output coupled to the isolation transformer, the error amplifier providing an error signal that is representative of the difference between an output voltage and a desired output voltage.

Abstract: An apparatus (54) is provided for preventing cross conduction in a synchronous rectifier of a DC-DC converter (10). The DC-DC converter has an input MOSFET switch (26) coupled to primary windings (22) of an isolation transformer (20), an output MOSFET switch (30) coupled to secondary windings (24) of the isolation transformer, and a complementary output MOSFET switch (34) coupled to an output terminal (14). A synchronous rectifier timing circuit (54) comprises a first timing output signal circuit (62) responsive to a pulse width modulated signal for providing first and second timing output signals (55, 56) that switches low at time t1 and high at time t4 to control the input MOSFET switch and output MOSFET switch, respectively, and a second timing output signal circuit (64) responsive to the pulse width modulated signal for providing a third timing output signal (58) that switches high at time t2 and low at time t3 to control the complementary output MOSFET switch.

Abstract: A timing control circuit (70) generates staggered signals from a pulse width modulated signal (68) providing lossless switching in a DC to DC power converter (10). The DC to DC power converter (10) comprises two input MOSFET switches (22, 28) coupled to primary windings (34) of an isolation transformer (36) and two output MOSFET switches (38, 50) coupled to secondary windings (48) of the isolation transformer. The timing circuit (70) comprises an input terminal (90) for receiving a pulse width modulated signal (68) that switches low at time t1 and high at time t4. A first timing output signal circuit (92) is responsive to the pulse width modulated signal (68) and provides a first timing output signal (72) that switches low at time t1 and high at time t7 to control one of the input MOSFET switches (22).