Patents by Inventor George Chochia

George Chochia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8191056
    Abstract: A target operation in a normalized target loop, susceptible of vectorization and which may, after compilation into a vectorized form, seek to operate on data in nonconsecutive physical memory, is identified in source code. Hardware instructions are inserted into executable code generated from the source code, directing a system that will run the executable code to create a representation of the data in consecutive physical memory. A vector loop containing the target operation is replaced, in the executable code, with a function call to a vector library to call a vector function that will operate on the representation to generate a result identical to output expected from executing the vector loop containing the target operation. On execution, a representation of data residing in nonconsecutive physical memory is created in consecutive physical memory, and the vectorized target operation is applied to the representation to process the data.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: May 29, 2012
    Assignee: International Business Machines Corporation
    Inventors: Roch Georges Archambault, George Chochia, Peng Zhao
  • Publication number: 20080092125
    Abstract: A target operation in a normalized target loop, susceptible of vectorization and which may, after compilation into a vectorized form, seek to operate on data in nonconsecutive physical memory, is identified in source code. Hardware instructions are inserted into executable code generated from the source code, directing a system that will run the executable code to create a representation of the data in consecutive physical memory. A vector loop containing the target operation is replaced, in the executable code, with a function call to a vector library to call a vector function that will operate on the representation to generate a result identical to output expected from executing the vector loop containing the target operation. On execution, a representation of data residing in nonconsecutive physical memory is created in consecutive physical memory, and the vectorized target operation is applied to the representation to process the data.
    Type: Application
    Filed: October 13, 2006
    Publication date: April 17, 2008
    Inventors: Roch Georges Archambault, George Chochia, Peng Zhao
  • Publication number: 20040176942
    Abstract: Method, system and program product are provided for simulation of a network adapter for a computing unit of a computing environment. The simulation includes providing a behavioral simulation of the network adapter and mapping the behavioral simulation to system memory of the computing unit to allow for direct memory access. Through the mapping, a network adapter function issued by a user application process of the computing unit is transparently redirected to the behavioral simulation of the network adapter, to thereby invoke a desired functional behavior. Multiple instances of the behavioral simulation of the network adapter can be employed within a single computing unit, and/or can be employed across multiple computing units of the computing environment.
    Type: Application
    Filed: March 4, 2003
    Publication date: September 9, 2004
    Applicant: International Business Machines Corporation
    Inventors: George A. Chochia, Kevin J. Reilly, Paul D. DiNicola, Wen C. Chen, Patricia E. Heywood