Patents by Inventor George D. Doland

George D. Doland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4680765
    Abstract: Error correcting decoders fall into two catagories, block decoders and convolutional decoders. In either case, the decoder must be synchronized with the received data. For block decoders, an external signal such as that produced by a Frame Synchronizer can be used for this purpose. For many applications, it is preferable to have the decoder acquire synchronization automatically without the need for an external device. This disclosure describes a circuit for automatically synchronizing a block decoder. When the usual or conventional methods are used, a special pattern called the Frame Sync Signal must be transmitted. In this new improved circuit, the synchronization information is contained in the error correcting code with no additional bits being required for synchronization and no reduction in error correcting capability. Because of the relative simplicity of the circuit, it may be incorporated within the decoder or optionally, it may be contained in a separate device.
    Type: Grant
    Filed: July 26, 1985
    Date of Patent: July 14, 1987
    Inventor: George D. Doland
  • Patent number: 4341925
    Abstract: A new and improved secure communication system is provided. A product code, formed from two pseudorandom sequences of digital bits, is used to encipher or scramble data prior to transmission. The two pseudorandom sequences are periodically changed at intervals before they have had time to repeat. One of the two sequences is transmitted continuously with the scrambled data for synchronization.In the receiver portion of the system, the incoming signal is compared with one of two locally generated pseudorandom sequences until correspondence between the sequences is obtained. At this time, the two locally generated sequences are formed into a product code which deciphers the data from the incoming signal. Provision is made to ensure synchronization of the transmitting and receiving portions of the system.
    Type: Grant
    Filed: April 28, 1978
    Date of Patent: July 27, 1982
    Inventors: Robert A. Administrator of the National Aeronautics and Space Administration, with respect to an invention of Frosch, George D. Doland
  • Patent number: 4119972
    Abstract: The present invention provides several new and useful improvements in steering and control of phased array antennas having a small number of elements, typically on the order of 5 to 17 elements. Among the improvements are increasing the number of beam steering positions, reducing the possibility of phase transients in signals received or transmitted with the antennas, and increasing control and testing capacity with respect to the antennas.
    Type: Grant
    Filed: February 3, 1977
    Date of Patent: October 10, 1978
    Inventors: James C. Administrator of the National Aeronautics and Space Administration, with respect to an invention of Fletcher, George D. Doland
  • Patent number: 4038636
    Abstract: This disclosure describes a Multiple Decoding System which includes a means for encoding digital data and decoding by three different methods. These methods are referred to as Parity Decoding which includes Parity I and Parity II Decoding, Sequential Decoding by rank, and a combination of these two methods. This third method is Multiple Decoding and consists of a combination of Parity and Sequential Decoding.
    Type: Grant
    Filed: June 18, 1975
    Date of Patent: July 26, 1977
    Inventor: George D. Doland