Patents by Inventor George D. Skidmore

George D. Skidmore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10121912
    Abstract: Methods and structures of photodetectors are described. The structure may include a readout integrated circuit substrate having an internally integrated capacitor. The structure may additionally include an external capacitor overlying the readout integrated circuit substrate. The external capacitor may be coupled with the internally integrated capacitor of the readout integrated circuit substrate, and configured to operate in parallel with the internally integrated capacitor of the readout integrated circuit substrate. The structure may also include a detector overlying the external capacitor.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: November 6, 2018
    Assignee: DRS Network & Imaging Systems, LLC
    Inventors: Kirk D. Peterson, Eugene E. Krueger, Cari A. Ossenfort, Daniel B. Jardine, George D. Skidmore
  • Patent number: 9924114
    Abstract: An apparatus includes a detector that measures radiation. The apparatus also includes a window that is relationally coupled to the detector and a shield, so that the window is in between the detector and the shield. The apparatus further includes the shield that emits substantially constant radiation, and substantially blocks radiation from a camera housing at least partially surrounding the shield, so that the detector measures radiation passing through an optical system and the shield.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: March 20, 2018
    Assignee: DRS Network & Imaging Systems, LLC
    Inventors: Henry W. Neal, George D. Skidmore, Jeff R. Emmett, Richard L. Southerland, Samuel E. Ivey
  • Publication number: 20150035108
    Abstract: Methods and structures of photodetectors are described. The structure may include a readout integrated circuit substrate having an internally integrated capacitor. The structure may additionally include an external capacitor overlying the readout integrated circuit substrate. The external capacitor may be coupled with the internally integrated capacitor of the readout integrated circuit substrate, and configured to operate in parallel with the internally integrated capacitor of the readout integrated circuit substrate. The structure may also include a detector overlying the external capacitor.
    Type: Application
    Filed: October 21, 2014
    Publication date: February 5, 2015
    Applicant: DRS RSTA, Inc.
    Inventors: Kirk D. Peterson, Eugene E. Krueger, Cari A. Ossenfort, Daniel B. Jardine, George D. Skidmore
  • Patent number: 8895343
    Abstract: Methods and structures of photodetectors are described. The structure may include a readout integrated circuit substrate having an internally integrated capacitor. The structure may additionally include an external capacitor overlying the readout integrated circuit substrate. The external capacitor may be coupled with the internally integrated capacitor of the readout integrated circuit substrate, and configured to operate in parallel with the internally integrated capacitor of the readout integrated circuit substrate. The structure may also include a detector overlying the external capacitor.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: November 25, 2014
    Assignee: DRS RSTA, Inc.
    Inventors: Kirk D. Peterson, Eugene E. Krueger, Cari A. Ossenfort, Daniel B. Jardine, George D. Skidmore
  • Publication number: 20140267763
    Abstract: An apparatus includes a detector that measures radiation. The apparatus also includes a window that is relationally coupled to the detector and a shield, so that the window is in between the detector and the shield. The apparatus further includes the shield that emits substantially constant radiation, and substantially blocks radiation from a camera housing at least partially surrounding the shield, so that the detector measures radiation passing through an optical system and the shield.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 18, 2014
    Applicant: DRS RSTA, INC.
    Inventors: Henry W. Neal, George D. Skidmore, Jeff R. Emmett, Richard L. Southerland, Samuel E. Ivey
  • Patent number: 7799132
    Abstract: A patterned layer is formed by removing nanoscale passivating particle from a first plurality of nanoscale structural particles or by adding nanoscale passivating particles to the first plurality of nanoscale structural particles. Each of a second plurality of nanoscale structural particles is deposited on each of corresponding ones of the first plurality of nanoscale structural particles that is not passivated by one of the plurality of nanoscale passivating particles.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: September 21, 2010
    Assignee: Zyvex Labs, LLC
    Inventors: John N. Randall, Jingping Peng, Jun-Fu Liu, George D. Skidmore, Christof Baur, Richard E. Stallcup, Robert J. Folaron
  • Patent number: 7622717
    Abstract: A pixel structure for use in an infrared imager is provided. The pixel structure includes a substrate and a bolometer. The bolometer includes a transducer that has a spaced apart relationship with respect to the substrate and has an electrical resistance that varies in response to changes in the temperature of the transducer. The bolometer also includes an absorber that has a spaced apart relationship with respect to the transducer and has a thermal connection to the transducer permitting radiation absorbed by the absorber to heat the transducer. The absorber has a top side defining a recess or channel in the absorber. The recess or channel is adapted to effect the propagation path of a portion of radiation received by the absorber such that the radiation portion is absorbed by the absorber rather than exiting the absorber. The recess or channel also decreases the thermal mass of the bolometer.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: November 24, 2009
    Assignee: DRS Sensors & Targeting Systems, Inc.
    Inventors: George D. Skidmore, Christopher G. Howard
  • Publication number: 20090140147
    Abstract: A pixel structure for use in an infrared imager is provided. The pixel structure includes a substrate and a bolometer. The bolometer includes a transducer that has a spaced apart relationship with respect to the substrate and has an electrical resistance that varies in response to changes in the temperature of the transducer. The bolometer also includes an absorber that has a spaced apart relationship with respect to the transducer and has a thermal connection to the transducer permitting radiation absorbed by the absorber to heat the transducer. The absorber has a top side defining a recess or channel in the absorber. The recess or channel is adapted to effect the propagation path of a portion of radiation received by the absorber such that the radiation portion is absorbed by the absorber rather than exiting the absorber. The recess or channel also decreases the thermal mass of the bolometer.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 4, 2009
    Inventors: George D. Skidmore, Christopher G. Howard
  • Patent number: 7326293
    Abstract: A patterned layer is formed by removing nanoscale passivating particle from a first plurality of nanoscale structural particles or by adding nanoscale passivating particles to the first plurality of nanoscale structural particles. Each of a second plurality of nanoscale structural particles is deposited on each of corresponding ones of the first plurality of nanoscale structural particles that is not passivated by one of the plurality of nanoscale passivating particles.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: February 5, 2008
    Assignee: Zyvex Labs, LLC
    Inventors: John N. Randall, Jingping Peng, Jun-Fu Liu, George D. Skidmore, Christof Baur, Richard E. Stallcup, II, Robert J. Folaron
  • Patent number: 7240420
    Abstract: A system and method are disclosed which enable post-fabrication reduction of minimum feature size spacing of microcomponents. A method for producing an assembly of microcomponents is provided, in which at least two microcomponents are fabricated having a separation space therebetween. At least one of the microcomponents includes an extension part that is operable to reduce the separation space. Such an extension part may include an extension member that is movably extendable away from its associated microcomponent to reduce the separation space between its associated microcomponent and another microcomponent. The extension part may be latched at a desired position by a latching mechanism. The extension part may be implemented such that the extension member eliminates the separation space, thereby resulting in such extension member engaging another microcomponent. Such engagement may be achieved without requiring power to be applied to the microcomponents.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: July 10, 2007
    Assignee: Zyvex Labs, LLC
    Inventors: Matthew D. Ellis, Eric G. Parker, George D. Skidmore
  • Patent number: 7224035
    Abstract: Fabricating electrical isolation properties into a MEMS device is described. One embodiment comprises a main substrate layer of a high-resistivity semiconductor material, such as high-resistivity silicon. The high-resistivity substrate is then controllably doped to provide a region of high-conductivity in the main substrate. Electrical isolation is achieved in such an embodiment by patterning the high-conductivity region either by masking the main substrate during the doping or etching through the doped, high-conductivity region in order to form regions of high conductivity. Effective isolation results from confinement of electrical currents to the lowest-resistance path. An alternative embodiment employs the fabrication of pn junctions and the use of reverse biasing to enhance the electrical isolation. A further embodiment comprises a main substrate layer of low-resistivity semiconductor material with a layer of insulator deposited thereon.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: May 29, 2007
    Assignee: Zyvex Corporation
    Inventors: George D. Skidmore, Gregory A. Magel, Charles G. Roberts
  • Patent number: 7096568
    Abstract: A new process and structure for microcomponent interconnection utilizing a post-assembly activated junction compound. In one embodiment, first and second microcomponents having respective first and second contact areas are provided. A junction compound is formed on one of the first and second contact areas, and the first and second contact areas are positioned adjacent each other on opposing sides of the junction compound. The junction compound is then activated to couple the first and second microcomponents.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: August 29, 2006
    Assignee: Zyvex Corporation
    Inventors: Erik Nilsen, Matthew D. Ellis, Charles L. Goldsmith, Jeong Bong Lee, Xiaojun Huang, Arun Kumar Nallani, Kabseog Kim, George D. Skidmore
  • Patent number: 6879016
    Abstract: A system and method is disclosed that strengthens the structural integrity of trench-fill electrical isolation techniques. One embodiment provides for etching a series of interlocking geometric trenches into a device layer and filling the trenches with a non-conductive dielectric material. The dielectric material establishes electrical isolation while the interlocking geometric trenches strengthen the structural integrity of the separation by providing at least one surface on the interlocking separation that experiences a compression force for each direction that the electrically isolated MEMS component is moved.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: April 12, 2005
    Assignee: Zyvex Corporation
    Inventors: George D. Skidmore, Aaron Geisberger, Matthew D. Ellis
  • Patent number: 6762116
    Abstract: A system and method is described for fabricating microcomponents onto pre-existing integrated electronics. One embodiment of the present invention provides additional process steps after completion of all electronics fabrication that may etch trough the oxide of any passivation layer that may be there to the single crystal silicon (SCS) of a silicon on insulator (SOI) integrated circuit. Once at the SCS level of the existing wafer, any number of microcomponents, such as connectors, receptacles, handles, tethers, and the like may preferably be fabricated onto the chip using relatively low temperature and inexpensive processing; thus, preferably preserving the integrity of the preexisting electronics.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: July 13, 2004
    Assignee: Zyvex Corporation
    Inventor: George D. Skidmore
  • Patent number: 6677225
    Abstract: A system and method are disclosed which constrain a microcomponent that is totally released from a substrate for handling of such totally released microcomponent. A preferred embodiment provides a system and method which constrain a totally released microcomponent to a base (e.g., another microcomponent or a substrate). For example, a preferred embodiment provides constraining members that work to constrain a microcomponent to a substrate as such microcomponent is totally released from such substrate. Accordingly, such constraining members may aid in preserving the microcomponent with its substrate during the release of such microcomponent from its substrate during fabrication. Additionally, a preferred embodiment provides constraining members that are suitable for constraining a totally released microcomponent to a base for post-fabrication handling of the microcomponent.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: January 13, 2004
    Assignee: Zyvex Corporation
    Inventors: Matthew D. Ellis, Eric G. Parker, George D. Skidmore
  • Patent number: 6678458
    Abstract: A system and method are disclosed that enable precise positioning of microcomponents. According to one embodiment, a system and method for positioning a microcomponent are disclosed, wherein a microcomponent is received into a microcomponent positioning device. A target position for the microcomponent may then be determined, and at least a portion of the microcomponent positioning device is controllably deformed to accurately fix, at least temporarily, the position of the microcomponent at the target position. In one embodiment, microactuators that are operable to move the microcomponent are controllably deformed to fix the position of the microcomponent at the target position. In another embodiment, support beams that support a microcomponent holder are controllably deformed to fix the position of the microcomponent at the target position.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: January 13, 2004
    Assignee: Zynex Corporation
    Inventors: Matthew D. Ellis, George D. Skidmore
  • Patent number: 6676416
    Abstract: A system, apparatus, and method which enable microcomponents to be electrically coupled in a desirable manner are disclosed. More specifically, electrical coupling mechanisms are disclosed, which are suitable for providing an electrical coupling between two or more microcomponents. One electrical coupling mechanism provided herein, which may be utilized to provide a flexible coupling between two or more microcomponents, is a ribbon cable. Such a ribbon cable may include one or more electrically isolated conducting “rows,” which may enable communication of electrical signals between two or more microcomponents coupled to such ribbon cable. An electrical connector, such as an electrical snap connector, is also provided herein, which is suitable for electrically coupling two or more microcomponents.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: January 13, 2004
    Assignee: Zyvex Corporation
    Inventors: Matthew D. Ellis, George D. Skidmore
  • Patent number: 6672795
    Abstract: A system and method which provide a general-purpose snap connector suitable for coupling microcomponents are disclosed. A snap connector is disclosed that is suitable for performing general assembly, including out-of-plane, 3-D assembly of microcomponents, wherein such microcomponents may be securely coupled together. That is, a snap connector is disclosed which enables microcomponents to be coupled in a manner that constrains undesirable movement of the coupled components relative to each other. Preferably, such a snap connector may be pressure fit with a receptacle (or aperture) of a mating component in a manner that constrains translational and rotational degrees of freedom of the mating component relative to the snap connector. A preferred embodiment provides a “preloaded” snap connector that may be utilized to perform general assembly of microcomponents. An alternative embodiments provides a non-preloaded snap connector suitable for performing general assembly of microcomponents.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: January 6, 2004
    Assignee: Zyvex Corporation
    Inventors: Matthew D. Ellis, George D. Skidmore
  • Publication number: 20030219220
    Abstract: A system and method are disclosed that enable precise positioning of microcomponents. According to one embodiment, a system and method for positioning a microcomponent are disclosed, wherein a microcomponent is received into a microcomponent positioning device. A target position for the microcomponent may then be determined, and at least a portion of the microcomponent positioning device is controllably deformed to accurately fix, at least temporarily, the position of the microcomponent at the target position. In one embodiment, microactuators that are operable to move the microcomponent are controllably deformed to fix the position of the microcomponent at the target position. In another embodiment, support beams that support a microcomponent holder are controllably deformed to fix the position of the microcomponent at the target position.
    Type: Application
    Filed: August 17, 2001
    Publication date: November 27, 2003
    Inventors: Matthew D. Ellis, George D. Skidmore
  • Patent number: 6561725
    Abstract: A system and method which provide a general-purpose pressure-fitting receptacle (or “clamp”) suitable for coupling microcomponents are disclosed. A pressure-fitting receptacle is disclosed that is suitable for performing general assembly, including out-of-plane, 3-D assembly of microcomponents, wherein such microcomponents may be securely coupled together. That is, a pressure-fitting receptacle is disclosed which enables microcomponents to be coupled in a manner that constrains undesirable movement of the coupled components relative to each other. Preferably, such a receptacle may be pressure fit with a mating component (or a portion thereof) in a manner that constrains translational and rotational degrees of freedom of the mating component relative to the receptacle. A preferred embodiment provides a “preloaded” receptacle that may be utilized to perform general assembly of microcomponents.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: May 13, 2003
    Assignee: Zyvex Corporation
    Inventors: Matthew D. Ellis, George D. Skidmore