Patents by Inventor George Deluca

George Deluca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Sealing arrangements
    Patent number: 9188227
    Abstract: A spirally wound strip (300) is thicker in the middle and is curved on both sides. Short flats (306) are formed at each side by surfaces that converge towards each other. Soft sealant material (316) extends over the flats (306).
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: November 17, 2015
    Assignee: Flexitallic Investments, Inc.
    Inventors: George Deluca, Brian Hasha, Jamal Jamlyaria, John Hoyes, Stephen Peter Bond
  • SEALING ARRANGEMENTS
    Publication number: 20120068415
    Abstract: A spirally wound strip (300) is thicker in the middle and is curved on both sides. Short flats (306) are formed at each side by surfaces that converge towards each other. Soft sealant material (316) extends over the flats (306).
    Type: Application
    Filed: February 26, 2010
    Publication date: March 22, 2012
    Applicant: Flexitallic Investments, Inc.
    Inventors: George Deluca, Brian Hasha, Jamal Jamlyaria, John Hoyes, Stephen Peter Bond
  • Latch assisted fuse testing for customized integrated circuits
    Patent number: 5206583
    Abstract: On-chip circuitry facilitates fuse testing in customized integrated circuits. The circuitry has specific application in testing fuse redundancy high end memories. A latch assisted fuse testing (LAFT) methodology employs an on-chip latch stack which can be used in place of the fuses. The latches in the stack are programmable and can perform the same function as the fuses during chip operation. This allows testing or experimentation to be performed nondestructively, without blowing any fuses. In one particular application of the invention, memory arrays with redundant blocks on a chip are provided with the on-chip latch stack. After the tests based on previously generated error data are performed using the latch stack, fuses are blown to repair the memory array by replacing defective memory blocks with redundant blocks.
    Type: Grant
    Filed: August 20, 1991
    Date of Patent: April 27, 1993
    Assignee: International Business Machines Corporation
    Inventors: James W. Dawson, George A. DeLuca, Michael Nicewicz