Abstract: A system and method to perform incremental adaptive modification of a virtual reality image involve obtaining sensor measurements from sensors coupled to an individual who is performing a task while viewing the virtual reality image. The method includes generating a true model of the individual from the sensor measurements, comparing the true model with an expert model obtained from another individual performing the task, and developing a lesson plan based on determining a difference between the true model and the expert model. The developing the lesson plan includes determining a gradient of intermediate models within the difference. A different one of the intermediate models is included iteratively along the gradient from the true model to the expert model in the virtual reality image.

Abstract: A system and method to perform incremental adaptive modification of a virtual reality image involve obtaining sensor measurements from sensors coupled to an individual who is performing a task while viewing the virtual reality image. The method includes generating a true model of the individual from the sensor measurements, comparing the true model with an expert model obtained from another individual performing the task, and developing a lesson plan based on determining a difference between the true model and the expert model. The developing the lesson plan includes determining a gradient of intermediate models within the difference. A different one of the intermediate models is included iteratively along the gradient from the true model to the expert model in the virtual reality image.

Abstract: Disclosed is a method, system and computer program product to specify an integrated circuit. The integrated circuit includes a hardwired specific logic technology portion and a programmable specific logic technology portion. The method includes generating a hybrid logic network by mapping each uncertain logic function to an abstract programmable logic element implementation thereof and by mapping each known logic function to a technology-independent logic element implementation thereof; simplifying the hybrid logic network using logic synthesis optimizations; mapping the simplified hybrid logic network to a specific technology by mapping the abstract programmable logic element implementation to the specific programmable logic technology and the technology-independent logic element implementation to the specific logic technology; and further includes optimizing the mapped network to meet performance constraints.

Abstract: Disclosed is a method, system and computer program product to specify an integrated circuit. The integrated circuit includes a hardwired specific logic technology portion and a programmable specific logic technology portion. The method includes generating a hybrid logic network by mapping each uncertain logic function to an abstract programmable logic element implementation thereof and by mapping each known logic function to a technology-independent logic element implementation thereof; simplifying the hybrid logic network using logic synthesis optimizations; mapping the simplified hybrid logic network to a specific technology by mapping the abstract programmable logic element implementation to the specific programmable logic technology and the technology-independent logic element implementation to the specific logic technology; and further includes optimizing the mapped network to meet performance constraints.