Abstract: Method for producing a low stress silicon oxynitride microstructure on a semiconductor substrate at temperatures not higher than 500.degree. C. The method is particularly adapted for forming integrated silicon sensors where the oxynitride microstructure is fabricated on a substrate under conditions which do not harm the integrated circuit electronics.

Abstract: Device comprising a substrate and a metallized sensor/heater element having a temperature coefficient of resistance of at least 2000 parts per million. Methods of fabricating the devices are also disclosed.

Abstract: A method of planarizing a semiconductor layer by use of a plasma etch step which also etches vias having a tapered profile is made possible by selecting a conformal layer preferably of a different material than the material through which the via is to be provided such that a plasma etch will establish differing etch rates in the conformal and underlying layers.

Abstract: Photoresist apertures having tapered sidewalls can be provided by first opening the aperture in accordance with ordinary practice followed by the exposure of the photoresist to a suitable energy source such as a flood exposure to wideband light, the heating of the photoresist to round the peripheral edges of the aperture and the exposure of the thus pretreated photoresist to an environment which removes photoresist from the inside wall of the aperture until the desired tapered profile is obtained. In the preferred practice of the invention, the pretreated photoresist is removed from the inside wall of the aperture through exposure to a dry oxygen plasma etch.

Abstract: A method is provided for semiconductor manufacture wherein a via is defined and etched through an insulative layer of the device to an underlying conductive region and metal fillets are formed in the corner regions of the via. A conformal metal layer is then deposited onto the device and etched until all metal is removed from the insulative layer surface. Finally, a second metal interconnect layer is deposited onto the device and the desired interconnect pattern is defined. The fillets displace the metal subsequently deposited on the via side surface laterally toward the center of the via, thereby preventing severe self-shadowing problems and improving step coverage of metal into the via.

Abstract: Cathode migration is reduced by increasing the width of the cathode at its leading edge compared to the width of the anode at its leading edge. Electromigration to a specific degree may be measured by placing an additional conductor connected to the anode portion of the base conductor and separated from the anode by the base conductor. A rapid change in resistance can be sensed as the anode electrically migrates past the additional conductor.

Abstract: An electromagnetic field measurement probe for measuring an electromagnetic field and providing a corresponding measurement signal to a measurement output. The electromagnetic field measurement probe comprises an antenna arrangement for detecting the electromagnetic field and producing a corresponding electrical output, and an output connector arrangement connected to the antenna arrangement for providing the corresponding electrical output to the measurement output of the probe. The output connector arrangement includes a lead structure comprising a dielectric having opposing faces on opposite sides thereof, and high resistivity lead material disposed on the opposing faces. The probe further comprises a diode rectifier disposed between and connecting two antenna elements forming the antenna arrangement, as well as two output connector bonding pads, each being electrically connected to the high resistivity material disposed on respective ones of the two opposing faces of the dielectric.

Abstract: A method of plasma planarization of the surface topography of a substrate layer is provided wherein a sacrificial layer, having an etch rate substantially different from the etch rate of the substrate layer, is applied to the surface topography of that substrate layer. The sacrificial and substrate layers are then plasma etched to remove the sacrificial layer and portions of the substrate layer. The ratio of substrate layer to sacrificial layer etch rate can be controlled by the specific material and etchant used to compensate for non-planar surface features of the sacrificial layer such that the resulting substrate surface topography is planar.