Abstract: A programmable delay circuit employs a comparator to control an output driver. The comparator compares a ramp signal to an error control signal derived from an error amplifier or in the alternative to a disable signal. The output of the comparator is latched on until a reset signal is received. The reset signal is produced when the ramp signal is discharged below a predetermined level. The programmable delay circuit is useful in a secondary side post regulator to control a totem pole driver. The totem pole driver in turn controls a switching device coupled to a voltage on a secondary winding.

Abstract: A foldback circuit which responds to a voltage differential between the input and output terminals of a voltage regulator in excess of a foldback threshold by lowering the current limit threshold of a current limit circuit. The foldback circuit includes a transistor with a base coupled to the input voltage and an emitter coupled to the output voltage. The collector when conducting provides a current that decreases the current limit threshold. Diodes in the path between the input and output voltages through the transistor may be used in establishing the foldback threshold.

Abstract: A programmable delay circuit employs a comparator to control an output driver. The comparator compares a ramp signal with a disable signal or an error control signal derived from an error amplifier. The comparator latches the output on until a reset signal is received. The reset signal is produced when the ramp signal is discharged below a predetermined level. The programmable delay circuit is useful in a secondary side post regulator to control a grounded totem pole driver. The totem pole driver in turn controls a switching device coupled to a voltage on a secondary winding.

Abstract: A sleep switch connected to a ramp pin, an undervoltage lockout circuit and a hysteretic differential comparator for use in the undervoltage lockout circuit are disclosed. An integrated circuit has a comparator that receives a voltage from the ramp pin which it compares with a control voltage. The sleep switch connected to the ramp pin is activated when the ramp pin is below a predetermined voltage threshold at which point it puts the integrated circuit into a low power consumption sleep mode. The undervoltage lockout circuit includes a detection leg connected between the supply terminal and ground. A current supply is enabled when the voltage across a resistive portion of a detection leg rises above a first threshold. A differential comparator is responsive to the detection voltage for enabling the current supply. The differential comparator may include three transistors arranged to provide first and second detection thresholds so as to establish a hysteresis.

Abstract: A voltage regulator with a current limit circuit for limiting pass current in a pass transistor below a current limit threshold and a foldback circuit for lowering the current limit threshold when the voltage differential between the input and output terminals of the voltage regulator exceeds a foldback threshold, where the current limit threshold has a negative temperature coefficient, the current limit circuit comprising two transistors coupled to a sense resistor such that the difference in emitter-to-base voltages of the transistors is equal to the voltage drop of the sense resistor, where the collectors of the two transistors provides first and second currents to first and second resistors, respectively, where the first current is responsive to a pass current flowing through the sense resistor and decreases when the pass current increases, where the second current is independent of the pass current, and the foldback circuit provides a third current to the second resistor when the voltage differential bet