Abstract: Systems, apparatuses, and methods for scanning a shopping space. The system pace comprises a locomotion system of a motorized unit, a camera system, and a central computer system. The central computer system is configured to receive motorized unit location information from the locomotion system, the motorized unit location information comprises a plurality of sets of coordinates each associated with a timestamp, receive item identifier instances from the camera system, wherein each item identifier instance is associated with a timestamp, and determine a location for each item identifier instance based on the timestamps associated of the item identifier instances and the timestamps associated with the plurality of sets of coordinates of the motorized unit location information.

Abstract: A method (and structure) that selectively forms a dielectric chamber on an electronic device by forming a dummy structure over a semiconductor substrate, depositing a dielectric layer over the dummy structure, forming an opening through the dielectric layer to the dummy structure, and removing the dummy structure to form the dielectric chamber.

Abstract: A method (and structure) that selectively forms a dielectric chamber on an electronic device by forming a dummy structure over a semiconductor substrate, depositing a dielectric layer over the dummy structure, forming an opening through the dielectric layer to the dummy structure, and removing the dummy structure to form the dielectric chamber.

Abstract: A method (and structure) that selectively forms a dielectric chamber on an electronic device by forming a dummy structure over a semiconductor substrate, depositing a dielectric layer over the dummy structure, forming an opening through the dielectric layer to the dummy structure, and removing the dummy structure to form the dielectric chamber.

Abstract: Low-k dielectric materials are incorporated as an insulator material between bit lines and an inter-level dielectric material. The device is first processed in a known manner, up to and including the deposition and anneal of the bit line metal, using a higher dielectric constant material that can withstand the higher temperature process steps as the insulator between the bit lines. Then, the higher dielectric constant material is removed using an etch that is selective to the bit line metal, and the low-k dielectric material is deposited. The low-k material may then be planarized to the top of the bit lines, and further low-k material deposited as an inter-level dielectric. Alternatively, sufficient low-k material is deposited in a single step to both fill the gaps between the bit lines as well as serve as an inter-level dielectric, and then the low-k dielectric material is planarized. Standard processing may then be carried out.