Abstract: A method for the characterization of large scale wafer topography is applied to improving yields in the manufacture large scale integrated (LSI) devices. First, the heights at the center, the edge and an intermediate point are measured on eight equally spaced radii. This provides eight values each for Y.sub.s and Y.sub.e which are averaged. Then the shape angle .alpha. is computed using the following equation: ##EQU1## The shape magnitude M is also computed using the following equation: ##EQU2## The thus computed values of .alpha. and M are correlated with individual wafer characteristics as to device performance and yield. Based on these results, the wafer processing is controlled to provide optimal wafer yield and isolation characteristics.

Abstract: The method is comprised of the following steps:implanting arsenic ions through a thin screen oxide layer in the regions of a P type silicon substrate where subcollectors are to be formed, at a dose less than 2.10.sup.16 at/cm.sup.2, partially etching said screen oxide layer to remove the upper portion, containing contaminating ions exposing to an oxygen ambiant to approximately reconstitute original thickness of the screen oxide layer and then annealing in an inert atmosphere, the substrate, to heal damages and distribute arsenic atoms in the substrate. It has been discovered that the step of reconstituting the original thickness of the screen oxide layer in an oxygen ambient, has the unexpected effect of permitting the subsequent growth of an absolutely defect free epitaxial layer.