Abstract: A transistor (14) having a plurality of sub-transistors (29a-f) includes a voltage controlling device (45). The voltage controlling device induces a current through an elongated gate (24) producing a voltage drop across the elongated gate (24) by providing a path between the gate and ground (32). The voltage drop across the elongated gate (24) sequentially reduces the gate voltage present at each of the sub-transistors (29a-f), thereby reducing the amount of current which the sub-transistors (29a-f) can conduct. The voltage controlling circuit (45) gradually reduces the current through the gate (24), thereby increasing the amount of current flowing through the sub-transistors (29a-f). The limiting of current through the output transistors (29a-f) for a predetermined time interval reduces the generation of output noise by controlling the rate at which current is changing in that output.

Abstract: A CMOS output pair provides rapid switching speed while avoiding excessive noise levels developed across the power supply parasitic inductance. Both the P-channel and N-channel transistors of the output pair actually comprise a plurality of sub-transistors with their source to drain current paths connected in parallel. As a result of novel RC coupling of a switching signal from gate to gate of either of the plurality of sub-transistors, the sub-transistors are caused to turn on sequentially. Since none of the sub-transistors is capable of supporting the current that must be carried by the totality of sub-transistors making up either the P-channel or N-channel transistor, the increments of current as each sub-transistor turns on are small relative to the total.

Abstract: An integratable programmable attenuator includes in one embodiment a plurality of field-effect transistors coupled to a semiconductor resistor at spaced apart locations thereon, the semiconductor resistor forming one of the source/drain regions of each of the transistors. The other source/drain region of each field-effect transistor is selectively coupled to an input of a differential amplifier, the output of which is coupled to one end region of the semiconductor resistor. The gain of the differential amplifier is variable in predetermined steps according to which of the transistors is selected.