Patents by Inventor George Jernakoff

George Jernakoff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5023566
    Abstract: A driver circuit for a voltage-switching, high frequency Class-D power amplifier provides an input sinewave power signal and controls the transition time between switching the two active devices thereof, resulting in substantially lossless switching. The transition time is optimized by controlling the amplitude of the voltage signals at the inputs of the two active devices, depending on the output capacitance of the switching devices, the threshold voltage of the switching devices, the power output requirement, and the impedance of the resonant load network of the Class-D power amplifier.
    Type: Grant
    Filed: December 21, 1989
    Date of Patent: June 11, 1991
    Assignee: General Electric Company
    Inventors: Sayed-Amr A. El-Hamamsy, George Jernakoff
  • Patent number: 4739225
    Abstract: A load is provided, at all times when in operation, with a D.C. voltage having at least a minimum holding magnitude by: providing a source voltage having a peak magnitude greater than the holding magnitude; connecting the source voltage to the load only while the source voltage magnitude is greater than a preselected magnitude; charging from the peak source voltage magnitude an energy storage element while the load is connnected to the source voltage; energizing the load from the charged energy storage element whenever the source voltage magnitude is less than the preselected magnitude; increasing the effective impedance of the load whenever the load is energized by the storage element; and selecting the energy storage element to provide at least the holding voltage to the load during each time interval when the energy storage element is connected to the load.
    Type: Grant
    Filed: November 3, 1986
    Date of Patent: April 19, 1988
    Assignee: General Electric Company
    Inventors: Victor D. Roberts, Milton D. Bloomer, George Jernakoff
  • Patent number: 4465982
    Abstract: A phase-locked loop provides an output frequency, locked to a multiple N of a reference frequency, responsive to a frequency-control voltage supplied to the output-frequency-generating voltage-controlled oscillator from the output of a differential amplifier. The differential amplifier inputs are provided with voltages sampled from the output of a pair of integrators respectively enabled for integration during complementary, and substantially identical, portions of the phase detector output waveform. Output-frequency-control voltage ripple is substantially reduced, with concomitant reduction of frequency modulation of the output freqeuncy, over the reference frequency period.
    Type: Grant
    Filed: February 18, 1982
    Date of Patent: August 14, 1984
    Assignee: General Electric Company
    Inventor: George Jernakoff
  • Patent number: 4376912
    Abstract: An operating circuit and method for efficiently operating and starting an electrodeless lamp having a magnetic core operated at radio frequencies. The circuit generates a current which flows through the winding of an electric field inducing means in the lamp in a reverse-bias direction, with respect to a drive current, to operate the core of the inducing means in all quadrants of the B-H curve, with the time average of all current through the lamp winding equaling approximately zero in order to avoid or minimize heat energy losses and sharp current peaks caused by saturation. This also allows use of lower current-capacity less-expensive components. The circuit repetitively applies constant-current DC drive pulses to the lamp winding for a small percentage of an interval during which energy is stored, which is used to generate the reverse-bias current.
    Type: Grant
    Filed: July 21, 1980
    Date of Patent: March 15, 1983
    Assignee: General Electric Company
    Inventor: George Jernakoff
  • Patent number: 4098130
    Abstract: An energy reflection flaw detection system utilizes a programmable system synchronization means having high stability and resolution, to facilitate the detection of flaws within an object to be analyzed even in the presence of relatively large amplitude reflections from front and back surfaces of the object. A surface encounter attenuator is actuated by the system synchronizer to highly attenuate the front and back surface echoes and allow flaws closely adjacent to the surfaces to be resolved by the broadband apparatus. Novel means for adjusting the system gain to compensate for divergence of the interrogating energy beam with time and distance is also utilized in this novel apparatus.
    Type: Grant
    Filed: March 11, 1977
    Date of Patent: July 4, 1978
    Assignee: General Electric Company
    Inventors: William N. Coffey, George Jernakoff, John R. Zurbrick